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@@ -1041,6 +1041,7 @@ static int sde_hw_ctl_reset_post_disable(struct sde_hw_ctl *ctx,
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ctx->flush.pending_merge_3d_flush_mask =
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ctx->flush.pending_merge_3d_flush_mask =
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BIT(merge_3d_idx - MERGE_3D_0);
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BIT(merge_3d_idx - MERGE_3D_0);
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merge_3d_active &= ~BIT(merge_3d_idx - MERGE_3D_0);
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merge_3d_active &= ~BIT(merge_3d_idx - MERGE_3D_0);
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+ UPDATE_MASK(ctx->flush.pending_flush_mask, MERGE_3D_IDX, 1);
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SDE_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active);
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SDE_REG_WRITE(c, CTL_MERGE_3D_ACTIVE, merge_3d_active);
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}
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}
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