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qcacmn: Add support for Waikiki HAL Tx

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Added HAL Tx specific function to support Waikiki Tx.

Change-Id: I7ded253739c91ab19490425b3ddd333a86f237c8
这个提交包含在：
Chaithanya Garrepalli
2021-08-12 17:14:34 +05:30
提交者 Madan Koyyalamudi
父节点 7ccb73b31f
当前提交 d5006a849b
共修改 12 个文件，包含 471 行新增和 282 行删除
下载 Patch 文件 下载 Diff 文件 展开所有文件 折叠所有文件

18
hal/wifi3.0/be/hal_be_api.h
查看文件

@@ -54,24 +54,6 @@ RX_MSDU_DETAILS_RX_MSDU_EXT_DESC_INFO_DETAILS_RESERVED_0A_OFFSET))
void hal_reo_setup_generic_be(struct hal_soc *soc,
void *reoparams);
void hal_tx_desc_set_search_index_generic_be(void *desc, uint32_t search_index);
/**
* hal_tx_desc_set_cache_set_num_generic_be - Set the cache-set-num value
* @desc: Handle to Tx Descriptor
* @cache_num: Cache set number that should be used to cache the index
* based search results, for address and flow search.
* This value should be equal to LSB four bits of the hash value
* of match data, in case of search index points to an entry
* which may be used in content based search also. The value can
* be anything when the entry pointed by search index will not be
* used for content based search.
*
* Return: void
*/
void hal_tx_desc_set_cache_set_num_generic_be(void *desc,
uint8_t cache_num);
/**
* hal_rx_msdu_ext_desc_info_get_ptr_be() - Get the msdu extension
* descriptor pointer.

68
hal/wifi3.0/be/hal_be_generic_api.c
查看文件

@@ -188,30 +188,6 @@ void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr)
return HAL_RX_MSDU_EXT_DESC_INFO_GET(msdu_details_ptr);
}
#ifdef TCL_DATA_CMD_SEARCH_INDEX_OFFSET
void hal_tx_desc_set_search_index_generic_be(void *desc, uint32_t search_index)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, SEARCH_INDEX) |=
HAL_TX_SM(TCL_DATA_CMD, SEARCH_INDEX, search_index);
}
#else
void hal_tx_desc_set_search_index_generic_be(void *desc, uint32_t search_index)
{
}
#endif
#ifdef TCL_DATA_CMD_CACHE_SET_NUM_OFFSET
void hal_tx_desc_set_cache_set_num_generic_be(void *desc, uint8_t cache_num)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, CACHE_SET_NUM) |=
HAL_TX_SM(TCL_DATA_CMD, CACHE_SET_NUM, cache_num);
}
#else
void hal_tx_desc_set_cache_set_num_generic_be(void *desc, uint8_t cache_num)
{
}
#endif
#if defined(QCA_WIFI_WCN7850) || defined(CONFIG_WIFI_EMULATION_WIFI_3_0)
static inline uint32_t
hal_wbm2sw_release_source_get(void *hal_desc, enum hal_be_wbm_release_dir dir)
@@ -262,6 +238,46 @@ uint32_t hal_tx_comp_get_buffer_source_generic_be(void *hal_desc)
HAL_BE_WBM_RELEASE_DIR_TX);
}
/**
* hal_tx_comp_get_release_reason_generic_be() - TQM Release reason
* @hal_desc: completion ring descriptor pointer
*
* This function will return the type of pointer - buffer or descriptor
*
* Return: buffer type
*/
uint8_t hal_tx_comp_get_release_reason_generic_be(void *hal_desc)
{
uint32_t comp_desc = *(uint32_t *)(((uint8_t *)hal_desc) +
WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_OFFSET);
return (comp_desc &
WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_MASK) >>
WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_LSB;
}
/**
* hal_get_wbm_internal_error_generic_be() - is WBM internal error
* @hal_desc: completion ring descriptor pointer
*
* This function will return 0 or 1 - is it WBM internal error or not
*
* Return: uint8_t
*/
uint8_t hal_get_wbm_internal_error_generic_be(void *hal_desc)
{
/*
* TODO - This func is called by tx comp and wbm error handler
* Check if one needs to use WBM2SW-TX and other WBM2SW-RX
*/
uint32_t comp_desc =
*(uint32_t *)(((uint8_t *)hal_desc) +
HAL_WBM_INTERNAL_ERROR_OFFSET);
return (comp_desc & HAL_WBM_INTERNAL_ERROR_MASK) >>
HAL_WBM_INTERNAL_ERROR_LSB;
}
/**
* hal_setup_link_idle_list_generic_be - Setup scattered idle list using the
* buffer list provided
@@ -886,6 +902,10 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
hal_gen_reo_remap_val_generic_be;
hal_soc->ops->hal_tx_comp_get_buffer_source =
hal_tx_comp_get_buffer_source_generic_be;
hal_soc->ops->hal_tx_comp_get_release_reason =
hal_tx_comp_get_release_reason_generic_be;
hal_soc->ops->hal_get_wbm_internal_error =
hal_get_wbm_internal_error_generic_be;
hal_soc->ops->hal_rx_mpdu_desc_info_get =
hal_rx_mpdu_desc_info_get_be;
hal_soc->ops->hal_rx_err_status_get = hal_rx_err_status_get_be;

84
hal/wifi3.0/be/hal_be_generic_api.h
查看文件

@@ -34,7 +34,6 @@
*
* Return: none
*/
static inline
void hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
struct hal_soc *hal)
{
@@ -99,51 +98,6 @@ void hal_tx_comp_get_status_generic_be(void *desc, void *ts1,
TX_RATE_STATS_INFO_TX_RATE_STATS);
}
/**
* hal_tx_desc_set_buf_addr - Fill Buffer Address information in Tx Descriptor
* @desc: Handle to Tx Descriptor
* @paddr: Physical Address
* @pool_id: Return Buffer Manager ID
* @desc_id: Descriptor ID
* @type: 0 - Address points to a MSDU buffer
* 1 - Address points to MSDU extension descriptor
*
* Return: void
*/
static inline void
hal_tx_desc_set_buf_addr_generic_be(void *desc, dma_addr_t paddr,
uint8_t rbm_id, uint32_t desc_id,
uint8_t type)
{
/* Set buffer_addr_info.buffer_addr_31_0 */
HAL_SET_FLD(desc, UNIFIED_TCL_DATA_CMD_0,
BUFFER_ADDR_INFO_BUF_ADDR_INFO) =
HAL_TX_SM(UNIFIED_BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0, paddr);
/* Set buffer_addr_info.buffer_addr_39_32 */
HAL_SET_FLD(desc, UNIFIED_TCL_DATA_CMD_1,
BUFFER_ADDR_INFO_BUF_ADDR_INFO) |=
HAL_TX_SM(UNIFIED_BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
(((uint64_t)paddr) >> 32));
/* Set buffer_addr_info.return_buffer_manager = rbm id */
HAL_SET_FLD(desc, UNIFIED_TCL_DATA_CMD_1,
BUFFER_ADDR_INFO_BUF_ADDR_INFO) |=
HAL_TX_SM(UNIFIED_BUFFER_ADDR_INFO_1,
RETURN_BUFFER_MANAGER, rbm_id);
/* Set buffer_addr_info.sw_buffer_cookie = desc_id */
HAL_SET_FLD(desc, UNIFIED_TCL_DATA_CMD_1,
BUFFER_ADDR_INFO_BUF_ADDR_INFO) |=
HAL_TX_SM(UNIFIED_BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
desc_id);
/* Set Buffer or Ext Descriptor Type */
HAL_SET_FLD(desc, UNIFIED_TCL_DATA_CMD_2,
BUF_OR_EXT_DESC_TYPE) |=
HAL_TX_SM(UNIFIED_TCL_DATA_CMD_2, BUF_OR_EXT_DESC_TYPE, type);
}
#if defined(QCA_WIFI_QCA6290_11AX_MU_UL) && defined(QCA_WIFI_QCA6290_11AX)
/**
* hal_rx_handle_other_tlvs() - handle special TLVs like MU_UL
@@ -1564,44 +1518,6 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
/**
* hal_tx_comp_get_release_reason_generic_be() - TQM Release reason
* @hal_desc: completion ring descriptor pointer
*
* This function will return the type of pointer - buffer or descriptor
*
* Return: buffer type
*/
static inline uint8_t hal_tx_comp_get_release_reason_generic_be(void *hal_desc)
{
uint32_t comp_desc =
*(uint32_t *)(((uint8_t *)hal_desc) +
WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_OFFSET);
return (comp_desc & WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_MASK) >>
WBM2SW_COMPLETION_RING_TX_TQM_RELEASE_REASON_LSB;
}
/**
* hal_get_wbm_internal_error_generic_be() - is WBM internal error
* @hal_desc: completion ring descriptor pointer
*
* This function will return 0 or 1 - is it WBM internal error or not
*
* Return: uint8_t
*/
static inline uint8_t hal_get_wbm_internal_error_generic_be(void *hal_desc)
{
//TODO - This func is called by tx comp and wbm error handler
//Check if one needs to use WBM2SW-TX and other WBM2SW-RX
uint32_t comp_desc =
*(uint32_t *)(((uint8_t *)hal_desc) +
HAL_WBM_INTERNAL_ERROR_OFFSET);
return (comp_desc & HAL_WBM_INTERNAL_ERROR_MASK) >>
HAL_WBM_INTERNAL_ERROR_LSB;
}
/**
* hal_tx_set_pcp_tid_map_generic_be() - Configure default PCP to TID map table
* @soc: HAL SoC context

157
hal/wifi3.0/be/hal_be_tx.h
查看文件

@@ -199,18 +199,34 @@ static inline void hal_tx_desc_sync(void *hal_tx_desc_cached,
qdf_mem_copy(hw_desc, hal_tx_desc_cached, HAL_TX_DESC_LEN_BYTES);
}
/**
* hal_tx_desc_set_vdev_id - set vdev id to the descriptor to Hardware
* @hal_tx_des_cached: Cached descriptor that software maintains
* @vdev_id: vdev id
*/
static inline void hal_tx_desc_set_vdev_id(void *desc, uint8_t vdev_id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, VDEV_ID) |=
HAL_TX_SM(TCL_DATA_CMD, VDEV_ID, vdev_id);
}
/**
* hal_tx_desc_set_bank_id - set bank id to the descriptor to Hardware
* @hal_tx_des_cached: Cached descriptor that software maintains
* @bank_id: bank id
*/
static inline void hal_tx_desc_set_bank_id(void *desc, uint8_t bank_id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, BANK_ID) |=
HAL_TX_SM(TCL_DATA_CMD, BANK_ID, bank_id);
}
/**
* hal_tx_desc_set_tcl_cmd_type - set tcl command type to the descriptor
* to Hardware
* @hal_tx_des_cached: Cached descriptor that software maintains
* @tcl_cmd_type: tcl command type
*/
static inline void
hal_tx_desc_set_tcl_cmd_type(void *desc, uint8_t tcl_cmd_type)
{
@@ -218,6 +234,50 @@ hal_tx_desc_set_tcl_cmd_type(void *desc, uint8_t tcl_cmd_type)
HAL_TX_SM(TCL_DATA_CMD, TCL_CMD_TYPE, tcl_cmd_type);
}
/**
* hal_tx_desc_set_lmac_id_be - set lmac id to the descriptor to Hardware
* @hal_soc_hdl: hal soc handle
* @hal_tx_des_cached: Cached descriptor that software maintains
* @lmac_id: lmac id
*/
static inline void
hal_tx_desc_set_lmac_id_be(hal_soc_handle_t hal_soc_hdl, void *desc,
uint8_t lmac_id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, PMAC_ID) |=
HAL_TX_SM(TCL_DATA_CMD, PMAC_ID, lmac_id);
}
/**
* hal_tx_desc_set_search_index_be - set search index to the
* descriptor to Hardware
* @hal_soc_hdl: hal soc handle
* @hal_tx_des_cached: Cached descriptor that software maintains
* @search_index: search index
*/
static inline void
hal_tx_desc_set_search_index_be(hal_soc_handle_t hal_soc_hdl, void *desc,
uint32_t search_index)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, SEARCH_INDEX) |=
HAL_TX_SM(TCL_DATA_CMD, SEARCH_INDEX, search_index);
}
/**
* hal_tx_desc_set_cache_set_num - set cache set num to the
* descriptor to Hardware
* @hal_soc_hdl: hal soc handle
* @hal_tx_des_cached: Cached descriptor that software maintains
* @cache_num: cache number
*/
static inline void
hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl, void *desc,
uint8_t cache_num)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, CACHE_SET_NUM) |=
HAL_TX_SM(TCL_DATA_CMD, CACHE_SET_NUM, cache_num);
}
/*---------------------------------------------------------------------------
* WBM Descriptor accessor APIs for Tx completions
* ---------------------------------------------------------------------------
@@ -392,4 +452,101 @@ hal_tx_populate_bank_register(hal_soc_handle_t hal_soc_hdl,
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
}
#define RBM_MAPPING_BMSK HWIO_TCL_R0_RBM_MAPPING0_SW2TCL1_RING_BMSK
#define RBM_MAPPING_SHFT HWIO_TCL_R0_RBM_MAPPING0_SW2TCL2_RING_SHFT
#define RBM_PPE2TCL_OFFSET \
(HWIO_TCL_R0_RBM_MAPPING0_PPE2TCL1_RING_SHFT >> 2)
#define RBM_TCL_CMD_CREDIT_OFFSET \
(HWIO_TCL_R0_RBM_MAPPING0_SW2TCL_CREDIT_RING_SHFT >> 2)
/**
* hal_tx_config_rbm_mapping_be() - Update return buffer manager ring id
* @hal_soc: HAL SoC context
* @hal_ring_hdl: Source ring pointer
* @rbm_id: return buffer manager ring id
*
* Return: void
*/
static inline void
hal_tx_config_rbm_mapping_be(struct hal_soc *hal_soc,
hal_ring_handle_t hal_ring_hdl,
uint8_t rbm_id)
{
struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
uint32_t reg_addr = 0;
uint32_t reg_val = 0;
uint32_t val = 0;
uint8_t ring_num;
enum hal_ring_type ring_type;
ring_type = srng->ring_type;
ring_num = hal_soc->hw_srng_table[ring_type].start_ring_id;
ring_num = ring_num - srng->ring_id;
reg_addr = HWIO_TCL_R0_RBM_MAPPING0_ADDR(MAC_TCL_REG_REG_BASE);
if (ring_type == PPE2TCL)
ring_num = ring_num + RBM_PPE2TCL_OFFSET;
else if (ring_type == TCL_CMD_CREDIT)
ring_num = ring_num + RBM_TCL_CMD_CREDIT_OFFSET;
/* get current value stored in register address */
val = HAL_REG_READ(hal_soc, reg_addr);
/* mask out other stored value */
val &= (~(RBM_MAPPING_BMSK << (RBM_MAPPING_SHFT * ring_num)));
reg_val = val | ((RBM_MAPPING_BMSK & rbm_id) <<
(RBM_MAPPING_SHFT * ring_num));
/* write rbm mapped value to register address */
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
}
/**
* hal_tx_desc_set_buf_addr_be - Fill Buffer Address information in Tx Desc
* @desc: Handle to Tx Descriptor
* @paddr: Physical Address
* @pool_id: Return Buffer Manager ID
* @desc_id: Descriptor ID
* @type: 0 - Address points to a MSDU buffer
* 1 - Address points to MSDU extension descriptor
*
* Return: void
*/
static inline void
hal_tx_desc_set_buf_addr_be(hal_soc_handle_t hal_soc_hdl, void *desc,
dma_addr_t paddr, uint8_t rbm_id,
uint32_t desc_id, uint8_t type)
{
/* Set buffer_addr_info.buffer_addr_31_0 */
HAL_SET_FLD(desc, TCL_DATA_CMD,
BUF_ADDR_INFO_BUFFER_ADDR_31_0) =
HAL_TX_SM(TCL_DATA_CMD, BUF_ADDR_INFO_BUFFER_ADDR_31_0, paddr);
/* Set buffer_addr_info.buffer_addr_39_32 */
HAL_SET_FLD(desc, TCL_DATA_CMD,
BUF_ADDR_INFO_BUFFER_ADDR_39_32) |=
HAL_TX_SM(TCL_DATA_CMD, BUF_ADDR_INFO_BUFFER_ADDR_39_32,
(((uint64_t)paddr) >> 32));
/* Set buffer_addr_info.return_buffer_manager = rbm id */
HAL_SET_FLD(desc, TCL_DATA_CMD,
BUF_ADDR_INFO_RETURN_BUFFER_MANAGER) |=
HAL_TX_SM(TCL_DATA_CMD,
BUF_ADDR_INFO_RETURN_BUFFER_MANAGER, rbm_id);
/* Set buffer_addr_info.sw_buffer_cookie = desc_id */
HAL_SET_FLD(desc, TCL_DATA_CMD,
BUF_ADDR_INFO_SW_BUFFER_COOKIE) |=
HAL_TX_SM(TCL_DATA_CMD, BUF_ADDR_INFO_SW_BUFFER_COOKIE,
desc_id);
/* Set Buffer or Ext Descriptor Type */
HAL_SET_FLD(desc, TCL_DATA_CMD,
BUF_OR_EXT_DESC_TYPE) |=
HAL_TX_SM(TCL_DATA_CMD, BUF_OR_EXT_DESC_TYPE, type);
}
#endif /* _HAL_BE_TX_H_ */

102
hal/wifi3.0/hal_tx.h
查看文件

@@ -745,83 +745,6 @@ void hal_tx_update_dscp_tid(hal_soc_handle_t hal_soc_hdl, uint8_t tid,
hal_soc->ops->hal_tx_update_dscp_tid(hal_soc, tid, id, dscp);
}
/**
* hal_tx_desc_set_lmac_id - Set the lmac_id value
* @desc: Handle to Tx Descriptor
* @lmac_id: mac Id to ast matching
* b00 – mac 0
* b01 – mac 1
* b10 – mac 2
* b11 – all macs (legacy HK way)
*
* Return: void
*/
static inline void hal_tx_desc_set_lmac_id(hal_soc_handle_t hal_soc_hdl,
void *desc, uint8_t lmac_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_lmac_id(desc, lmac_id);
}
/**
* hal_tx_desc_set_search_type - Set the search type value
* @desc: Handle to Tx Descriptor
* @search_type: search type
* 0 – Normal search
* 1 – Index based address search
* 2 – Index based flow search
*
* Return: void
*/
static inline void hal_tx_desc_set_search_type(hal_soc_handle_t hal_soc_hdl,
void *desc, uint8_t search_type)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_search_type(desc, search_type);
}
/**
* hal_tx_desc_set_search_index - Set the search index value
* @desc: Handle to Tx Descriptor
* @search_index: The index that will be used for index based address or
* flow search. The field is valid when 'search_type' is
* 1 0r 2
*
* Return: void
*/
static inline void hal_tx_desc_set_search_index(hal_soc_handle_t hal_soc_hdl,
void *desc,
uint32_t search_index)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_search_index(desc, search_index);
}
/**
* hal_tx_desc_set_cache_set_num - Set the cache-set-num value
* @desc: Handle to Tx Descriptor
* @cache_num: Cache set number that should be used to cache the index
* based search results, for address and flow search.
* This value should be equal to LSB four bits of the hash value
* of match data, in case of search index points to an entry
* which may be used in content based search also. The value can
* be anything when the entry pointed by search index will not be
* used for content based search.
*
* Return: void
*/
static inline void hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,
void *desc,
uint8_t cache_num)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_cache_set_num(desc, cache_num);
}
/**
* hal_tx_comp_get_status() - TQM Release reason
* @hal_desc: completion ring Tx status
@@ -839,31 +762,6 @@ static inline void hal_tx_comp_get_status(void *desc, void *ts,
hal_soc->ops->hal_tx_comp_get_status(desc, ts, hal_soc);
}
/**
* hal_tx_desc_set_buf_addr - Fill Buffer Address information in Tx Descriptor
* @desc: Handle to Tx Descriptor
* @paddr: Physical Address
* @pool_id: Return Buffer Manager ID
* @desc_id: Descriptor ID
* @type: 0 - Address points to a MSDU buffer
* 1 - Address points to MSDU extension descriptor
*
* Return: void
*/
static inline
void hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl, void *desc,
dma_addr_t paddr,
uint8_t pool_id, uint32_t desc_id,
uint8_t type)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_buf_addr(desc, paddr, pool_id,
desc_id, type);
}
/**
* hal_tx_set_pcp_tid_map_default() - Configure default PCP to TID map table
*

101
hal/wifi3.0/li/hal_li_tx.h
查看文件

@@ -37,6 +37,107 @@ enum hal_li_tx_ret_buf_manager {
* ---------------------------------------------------------------------------
*/
/**
* hal_tx_desc_set_buf_addr - Fill Buffer Address information in Tx Descriptor
* @desc: Handle to Tx Descriptor
* @paddr: Physical Address
* @pool_id: Return Buffer Manager ID
* @desc_id: Descriptor ID
* @type: 0 - Address points to a MSDU buffer
* 1 - Address points to MSDU extension descriptor
*
* Return: void
*/
static inline
void hal_tx_desc_set_buf_addr(hal_soc_handle_t hal_soc_hdl, void *desc,
dma_addr_t paddr,
uint8_t pool_id, uint32_t desc_id,
uint8_t type)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_buf_addr(desc, paddr, pool_id,
desc_id, type);
}
/**
* hal_tx_desc_set_lmac_id_li - Set the lmac_id value
* @desc: Handle to Tx Descriptor
* @lmac_id: mac Id to ast matching
* b00 – mac 0
* b01 – mac 1
* b10 – mac 2
* b11 – all macs (legacy HK way)
*
* Return: void
*/
static inline void hal_tx_desc_set_lmac_id_li(hal_soc_handle_t hal_soc_hdl,
void *desc, uint8_t lmac_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_lmac_id(desc, lmac_id);
}
/**
* hal_tx_desc_set_search_type_li - Set the search type value
* @desc: Handle to Tx Descriptor
* @search_type: search type
* 0 – Normal search
* 1 – Index based address search
* 2 – Index based flow search
*
* Return: void
*/
static inline void hal_tx_desc_set_search_type_li(hal_soc_handle_t hal_soc_hdl,
void *desc,
uint8_t search_type)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_search_type(desc, search_type);
}
/**
* hal_tx_desc_set_search_index_li - Set the search index value
* @desc: Handle to Tx Descriptor
* @search_index: The index that will be used for index based address or
* flow search. The field is valid when 'search_type' is
* 1 0r 2
*
* Return: void
*/
static inline void hal_tx_desc_set_search_index_li(hal_soc_handle_t hal_soc_hdl,
void *desc,
uint32_t search_index)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_search_index(desc, search_index);
}
/**
* hal_tx_desc_set_cache_set_num - Set the cache-set-num value
* @desc: Handle to Tx Descriptor
* @cache_num: Cache set number that should be used to cache the index
* based search results, for address and flow search.
* This value should be equal to LSB four bits of the hash value
* of match data, in case of search index points to an entry
* which may be used in content based search also. The value can
* be anything when the entry pointed by search index will not be
* used for content based search.
*
* Return: void
*/
static inline void hal_tx_desc_set_cache_set_num(hal_soc_handle_t hal_soc_hdl,
void *desc,
uint8_t cache_num)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_desc_set_cache_set_num(desc, cache_num);
}
/**
* hal_tx_desc_set_buf_length - Set Data length in bytes in Tx Descriptor
* @desc: Handle to Tx Descriptor

26
hal/wifi3.0/qcn9224/hal_9224.c
查看文件

@@ -1228,6 +1228,18 @@ static void hal_rx_dump_pkt_tlvs_9224(hal_soc_handle_t hal_soc_hdl,
}
#endif
#define HAL_NUM_TCL_BANKS_9224 48
/**
* hal_tx_get_num_tcl_banks_9224() - Get number of banks in target
*
* Returns: number of bank
*/
static uint8_t hal_tx_get_num_tcl_banks_9224(void)
{
return HAL_NUM_TCL_BANKS_9224;
}
static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
{
/* init and setup */
@@ -1239,21 +1251,8 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
/* tx */
hal_soc->ops->hal_tx_set_dscp_tid_map = hal_tx_set_dscp_tid_map_9224;
hal_soc->ops->hal_tx_update_dscp_tid = hal_tx_update_dscp_tid_9224;
hal_soc->ops->hal_tx_desc_set_lmac_id = hal_tx_desc_set_lmac_id_9224;
hal_soc->ops->hal_tx_desc_set_buf_addr =
hal_tx_desc_set_buf_addr_generic_be;
hal_soc->ops->hal_tx_desc_set_search_type =
hal_tx_desc_set_search_type_generic_be;
hal_soc->ops->hal_tx_desc_set_search_index =
hal_tx_desc_set_search_index_generic_be;
hal_soc->ops->hal_tx_desc_set_cache_set_num =
hal_tx_desc_set_cache_set_num_generic_be;
hal_soc->ops->hal_tx_comp_get_status =
hal_tx_comp_get_status_generic_be;
hal_soc->ops->hal_tx_comp_get_release_reason =
hal_tx_comp_get_release_reason_generic_be;
hal_soc->ops->hal_get_wbm_internal_error =
hal_get_wbm_internal_error_generic_be;
hal_soc->ops->hal_tx_init_cmd_credit_ring =
hal_tx_init_cmd_credit_ring_9224;
@@ -1394,6 +1393,7 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
hal_soc->ops->hal_rx_get_tlv_size = hal_rx_get_tlv_size_generic_be;
hal_soc->ops->hal_rx_msdu_is_wlan_mcast =
hal_rx_msdu_is_wlan_mcast_generic_be;
hal_soc->ops->hal_tx_get_num_tcl_banks = hal_tx_get_num_tcl_banks_9224;
hal_soc->ops->hal_rx_tlv_decap_format_get =
hal_rx_tlv_decap_format_get_be;
#ifdef RECEIVE_OFFLOAD

142
hal/wifi3.0/qcn9224/hal_9224_tx.h 普通文件
查看文件

@@ -0,0 +1,142 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
* above copyright notice and this permission notice appear in all
* copies.
*
* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
* WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
* AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
* DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
* PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
* TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
* PERFORMANCE OF THIS SOFTWARE.
*/
#include "tcl_data_cmd.h"
#include "phyrx_rssi_legacy.h"
#include "hal_internal.h"
#include "qdf_trace.h"
#include "hal_rx.h"
#include "hal_tx.h"
#include "hal_api_mon.h"
#define DSCP_TID_TABLE_SIZE 24
#define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
/**
* hal_tx_set_dscp_tid_map_9224() - Configure default DSCP to TID map table
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id: mapping table ID - 0-31
*
* DSCP are mapped to 8 TID values using TID values programmed
* in any of the 32 DSCP_TID_MAPS (id = 0-31).
*
* Return: none
*/
static void hal_tx_set_dscp_tid_map_9224(struct hal_soc *hal_soc, uint8_t *map,
uint8_t id)
{
int i;
uint32_t addr, cmn_reg_addr;
uint32_t value = 0, regval;
uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
return;
cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
MAC_TCL_REG_REG_BASE);
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
MAC_TCL_REG_REG_BASE,
id * NUM_WORDS_PER_DSCP_TID_TABLE);
/* Enable read/write access */
regval = HAL_REG_READ(soc, cmn_reg_addr);
regval |=
(1 <<
HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
HAL_REG_WRITE(soc, cmn_reg_addr, regval);
/* Write 8 (24 bits) DSCP-TID mappings in each interation */
for (i = 0; i < 64; i += 8) {
value = (map[i] |
(map[i + 1] << 0x3) |
(map[i + 2] << 0x6) |
(map[i + 3] << 0x9) |
(map[i + 4] << 0xc) |
(map[i + 5] << 0xf) |
(map[i + 6] << 0x12) |
(map[i + 7] << 0x15));
qdf_mem_copy(&val[cnt], (void *)&value, 3);
cnt += 3;
}
for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
regval = *(uint32_t *)(val + i);
HAL_REG_WRITE(soc, addr,
(regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
addr += 4;
}
/* Diasble read/write access */
regval = HAL_REG_READ(soc, cmn_reg_addr);
regval &=
~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
HAL_REG_WRITE(soc, cmn_reg_addr, regval);
}
/**
* hal_tx_update_dscp_tid_9224() - Update the dscp tid map table as updated
* by the user
* @soc: HAL SoC context
* @map: DSCP-TID mapping table
* @id : MAP ID
* @dscp: DSCP_TID map index
*
* Return: void
*/
static void hal_tx_update_dscp_tid_9224(struct hal_soc *hal_soc, uint8_t tid,
uint8_t id, uint8_t dscp)
{
int index;
uint32_t addr;
uint32_t value;
uint32_t regval;
struct hal_soc *soc = (struct hal_soc *)hal_soc;
addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
MAC_TCL_REG_REG_BASE, id);
index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
value = tid << (HAL_TX_BITS_PER_TID * index);
regval = HAL_REG_READ(soc, addr);
regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
regval |= value;
HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
}
/**
* hal_tx_init_cmd_credit_ring_9224() - Initialize command/credit SRNG
* @hal_soc_hdl: Handle to HAL SoC structure
* @hal_srng: Handle to HAL SRNG structure
*
* Return: none
*/
static inline void
hal_tx_init_cmd_credit_ring_9224(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl)
{
}

11
hal/wifi3.0/wcn7850/hal_7850.c
查看文件

@@ -1300,19 +1300,8 @@ static void hal_hw_txrx_ops_attach_wcn7850(struct hal_soc *hal_soc)
/* tx */
hal_soc->ops->hal_tx_set_dscp_tid_map = hal_tx_set_dscp_tid_map_7850;
hal_soc->ops->hal_tx_update_dscp_tid = hal_tx_update_dscp_tid_7850;
hal_soc->ops->hal_tx_desc_set_lmac_id = hal_tx_desc_set_lmac_id_7850;
hal_soc->ops->hal_tx_desc_set_buf_addr =
hal_tx_desc_set_buf_addr_generic_be;
hal_soc->ops->hal_tx_desc_set_search_index =
hal_tx_desc_set_search_index_generic_be;
hal_soc->ops->hal_tx_desc_set_cache_set_num =
hal_tx_desc_set_cache_set_num_generic_be;
hal_soc->ops->hal_tx_comp_get_status =
hal_tx_comp_get_status_generic_be;
hal_soc->ops->hal_tx_comp_get_release_reason =
hal_tx_comp_get_release_reason_generic_be;
hal_soc->ops->hal_get_wbm_internal_error =
hal_get_wbm_internal_error_generic_be;
hal_soc->ops->hal_tx_init_cmd_credit_ring =
hal_tx_init_cmd_credit_ring_7850;

17
hal/wifi3.0/wcn7850/hal_7850_tx.h
查看文件

@@ -132,23 +132,6 @@ static void hal_tx_update_dscp_tid_7850(struct hal_soc *hal_soc, uint8_t tid,
HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
}
/**
* hal_tx_desc_set_lmac_id - Set the lmac_id value
* @desc: Handle to Tx Descriptor
* @lmac_id: mac Id to ast matching
* b00 – mac 0
* b01 – mac 1
* b10 – mac 2
* b11 – all macs (legacy HK way)
*
* Return: void
*/
static void hal_tx_desc_set_lmac_id_7850(void *desc, uint8_t lmac_id)
{
HAL_SET_FLD(desc, TCL_DATA_CMD, PMAC_ID) |=
HAL_TX_SM(TCL_DATA_CMD, PMAC_ID, lmac_id);
}
/**
* hal_tx_init_cmd_credit_ring_7850() - Initialize command/credit SRNG
* @hal_soc_hdl: Handle to HAL SoC structure