qcacld-3.0: enable HAL_DELAYED_REG_WRITE_V2 and LOCK_LESS_ACCESS

Enable FEATURE_HAL_DELAYED_REG_WRITE_V2 support for Tx rings
register writes and QCA_OL_DP_SRNG_LOCK_LESS_ACCESS support
for Rx rings register writes, for moselle platforms.

Change-Id: I6b2469d22a37a097fa721269d311c0076c3b89a0
CRs-Fixed: 2873528

Kbuild

@@ -2678,6 +2678,8 @@ cppflags-$(CONFIG_PLD_PCIE_INIT_FLAG) += -DCONFIG_PLD_PCIE_INIT
 cppflags-$(CONFIG_WLAN_FEATURE_DP_RX_THREADS) += -DFEATURE_WLAN_DP_RX_THREADS
 cppflags-$(CONFIG_WLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT) += -DWLAN_FEATURE_RX_SOFTIRQ_TIME_LIMIT
 cppflags-$(CONFIG_FEATURE_HAL_DELAYED_REG_WRITE) += -DFEATURE_HAL_DELAYED_REG_WRITE
+cppflags-$(CONFIG_FEATURE_HAL_DELAYED_REG_WRITE_V2) += -DFEATURE_HAL_DELAYED_REG_WRITE_V2
+cppflags-$(CONFIG_QCA_OL_DP_SRNG_LOCK_LESS_ACCESS) += -DQCA_OL_DP_SRNG_LOCK_LESS_ACCESS
 
 
 cppflags-$(CONFIG_PLD_USB_CNSS) += -DCONFIG_PLD_USB_CNSS

configs/default_defconfig

@@ -527,6 +527,8 @@ ifeq ($(CONFIG_CNSS_QCA6750), y)
 	CONFIG_QCA6750_HEADERS_DEF := y
 	CONFIG_QCA_WIFI_QCA6750 := y
 	CONFIG_FEATURE_HAL_DELAYED_REG_WRITE := n
+	CONFIG_FEATURE_HAL_DELAYED_REG_WRITE_V2 := y
+	CONFIG_QCA_OL_DP_SRNG_LOCK_LESS_ACCESS := y
 endif
 
 ifeq ($(CONFIG_CNSS_QCA6750), y)