Преглед на файлове

Merge "msm: ipa: Fix updating the right pipe mask for hw stats"

qctecmdr преди 4 години
родител
ревизия
d440ac445a

+ 3 - 3
drivers/platform/msm/ipa/ipa_v3/ipa_hw_stats.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #include <linux/debugfs.h>
@@ -838,7 +838,7 @@ int ipa_init_teth_stats(struct ipa_teth_stats_endpoints *in)
 		}
 	}
 
-	IPADBG_LOW("prod_mask=[0x%x][0x%x]\n",
+	IPADBG("prod_mask=[0x%x][0x%x]\n",
 		in->prod_mask[0], in->prod_mask[1]);
 
 	/* reset driver's cache */
@@ -2341,7 +2341,7 @@ static ssize_t ipa_debugfs_print_tethering_stats(struct file *file,
 			if (IPA_CLIENT_IS_TEST(j))
 				continue;
 
-			cons_reg = ipahal_get_ep_reg_idx(j);
+			cons_reg = ipahal_get_ep_reg_idx(cons_idx);
 			if (!(ipa3_ctx->hw_stats->teth.init.
 				cons_bitmask[ep_idx][cons_reg]
 				& ipahal_get_ep_bit(cons_idx)))

+ 23 - 10
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats.c

@@ -231,14 +231,14 @@ static struct ipahal_stats_init_pyld *ipahal_generate_init_pyld_tethering_v5_0(
 	struct ipahal_stats_init_pyld *pyld;
 	struct ipahal_stats_init_tethering *in =
 		(struct ipahal_stats_init_tethering *)params;
-	int hdr_entries;
+	int hdr_entries = 0;
 	int entries = 0;
 	int i, j, reg_idx;
 	void *pyld_ptr;
 	u32 incremental_offset;
 
 	for (i = 0; i < IPAHAL_IPA5_PIPE_REG_NUM; i++) {
-		hdr_entries = _count_ones(in->prod_bitmask[i]);
+		hdr_entries += _count_ones(in->prod_bitmask[i]);
 	}
 
 	IPAHAL_DBG_LOW("prod entries = %d\n", hdr_entries);
@@ -292,19 +292,32 @@ static struct ipahal_stats_init_pyld *ipahal_generate_init_pyld_tethering_v5_0(
 
 	reg_idx = 0;
 	for (i = 0; i < IPAHAL_IPA5_PIPES_NUM; i++) {
+
+		if (i > 0 && !(i % IPAHAL_MAX_PIPES_PER_REG)) {
+			reg_idx++;
+		}
+
 		if ((reg_idx < IPAHAL_IPA5_PIPE_REG_NUM) &&
 			(in->prod_bitmask[reg_idx] & ipahal_get_ep_bit(i))) {
 			struct ipahal_stats_tethering_hdr_v5_0_hw *hdr =
 				pyld_ptr;
-
-			if (i > 0 && !(i % IPAHAL_MAX_PIPES_PER_REG)) {
-				reg_idx++;
-			}
-			hdr->dst_mask1 = in->cons_bitmask[i][0];
-			hdr->dst_mask1 = in->cons_bitmask[i][1];
+			// TODO: for future versions of num HW consumers > 16
+			hdr->dst_mask_31_0 =
+				((in->cons_bitmask[i][0] >> IPAHAL_IPA5_PRODUCER_PIPE_NUM) |
+				(in->cons_bitmask[i][1] << IPAHAL_IPA5_PRODUCER_PIPE_NUM));
+			hdr->dst_mask_63_32 =
+				in->cons_bitmask[i][1] >> IPAHAL_IPA5_PRODUCER_PIPE_NUM;
+			// TODO: for future when num pipes > 64
+			hdr->dst_mask_95_64 = 0;
+			hdr->dst_mask_127_96 = 0;
 			hdr->offset = incremental_offset;
-			IPAHAL_DBG_LOW("hdr->dst_mask=0x[%X][%X]\n",
-				hdr->dst_mask1, hdr->dst_mask2);
+			IPAHAL_DBG_LOW("Pipe: %d\n", i);
+			IPAHAL_DBG_LOW("hdr->dst_mask_31_0=[0x%x],"
+				"hdr->dst_mask_63_32=[0x%x],"
+				"hdr->dst_mask_95_64=[0x%x],"
+				"hdr->dst_mask_127_96=[0x%x]\n",
+				hdr->dst_mask_31_0, hdr->dst_mask_63_32,
+				hdr->dst_mask_95_64, hdr->dst_mask_127_96);
 			IPAHAL_DBG_LOW("hdr->offset=0x%x\n", hdr->offset);
 			/* add the stats entry */
 			incremental_offset +=

+ 2 - 1
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _IPAHAL_HW_STATS_H_
@@ -12,6 +12,7 @@
 #define IPAHAL_MAX_PIPES_PER_REG 32
 #define IPAHAL_IPA5_PIPES_NUM 36
 #define IPAHAL_IPA5_PIPE_REG_NUM 2
+#define IPAHAL_IPA5_PRODUCER_PIPE_NUM 16
 #define IPAHAL_MAX_RULE_ID_32 (1024 / 32) /* 10 bits of rule id */
 
 enum ipahal_hw_stats_type {

+ 7 - 5
drivers/platform/msm/ipa/ipa_v3/ipahal/ipahal_hw_stats_i.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
  */
 
 #ifndef _IPAHAL_HW_STATS_I_H_
@@ -23,10 +23,12 @@ struct ipahal_stats_tethering_hdr_hw {
 };
 
 struct ipahal_stats_tethering_hdr_v5_0_hw {
-	u64 dst_mask1;
-	u64 dst_mask2;
-	u64 offset : 32;
-	u64 reserved : 32;
+	u64 dst_mask_31_0:32;
+	u64 dst_mask_63_32:32;
+	u64 dst_mask_95_64:32;
+	u64 dst_mask_127_96:32;
+	u64 offset:32;
+	u64 reserved:32;
 };
 
 struct ipahal_stats_tethering_hw {