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disp: msm: dp: get DSC enable status from mode instead of panel

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DSC enable status is updated in DP panel struct as per the DPCD reg
read which is done at the start of the HPD ISR. However, there is a
chance that DSC is actually disabled later during mode query due to
shortage of DSC blocks. This status is stored as part of compression
info structure. This change checks for the latter struct to determine
the actual DSC status.

Change-Id: Id7cd4e65060f2ec939f945e9ac4f4e66260605d3
Signed-off-by: Sandeep Gangadharaiah <quic_sandgang@quicinc.com>
This commit is contained in:
Sandeep Gangadharaiah
2022-06-23 09:48:18 -07:00
parent 3f859c78b5
commit d333d97bd6
4 changed files with 28 additions and 17 deletions
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15
msm/dp/dp_ctrl.c
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@@ -1237,15 +1237,24 @@ static void dp_ctrl_mst_stream_setup(struct dp_ctrl_private *ctrl,
lanes, bw_code, x_int, y_frac_enum);
}
static void dp_ctrl_dsc_setup(struct dp_ctrl_private *ctrl)
static void dp_ctrl_dsc_setup(struct dp_ctrl_private *ctrl, struct dp_panel *panel)
{
int rlen;
u32 dsc_enable;
struct dp_panel_info *pinfo = &panel->pinfo;
if (!ctrl->fec_mode)
return;
dsc_enable = ctrl->dsc_mode ? 1 : 0;
/* Set DP_DSC_ENABLE DPCD register if compression is enabled for SST monitor.
* Set DP_DSC_ENABLE DPCD register if compression is enabled for
* atleast 1 of the MST monitor.
*/
dsc_enable = (pinfo->comp_info.enabled == true) ? 1 : 0;
if (ctrl->mst_mode && (panel->stream_id == DP_STREAM_1) && !dsc_enable)
return;
rlen = drm_dp_dpcd_writeb(ctrl->aux->drm_aux, DP_DSC_ENABLE,
dsc_enable);
if (rlen < 1)
@@ -1298,7 +1307,7 @@ static int dp_ctrl_stream_on(struct dp_ctrl *dp_ctrl, struct dp_panel *panel)
/* wait for link training completion before fec config as per spec */
dp_ctrl_fec_setup(ctrl);
dp_ctrl_dsc_setup(ctrl);
dp_ctrl_dsc_setup(ctrl, panel);
return rc;
}