Merge "ubwcp: limit error logs"
This commit is contained in:

committed by
Gerrit - the friendly Code Review server

commit
d310882b06
@@ -13,18 +13,14 @@
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#include "ubwcp_hw.h"
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extern u32 ubwcp_debug_trace_enable;
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static bool ubwcp_hw_trace_en;
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//#define DBG(fmt, args...)
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#define DBG(fmt, args...) \
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do { \
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if (ubwcp_debug_trace_enable) \
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if (ubwcp_hw_trace_en) \
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pr_err("ubwcp: hw: %s(): " fmt "\n", __func__, ##args); \
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} while (0)
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#define ERR(fmt, args...) \
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do { \
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if (ubwcp_debug_trace_enable) \
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pr_err("ubwcp: hw: %s(): ~~~ERROR~~~: " fmt "\n", __func__, ##args); \
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} while (0)
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#define ERR(fmt, args...) pr_err("ubwcp: hw: %s(): ~~~ERROR~~~: " fmt "\n", __func__, ##args);
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MODULE_LICENSE("GPL");
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@@ -65,6 +61,8 @@ MODULE_LICENSE("GPL");
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#define SPARE 0x1188
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#define UBWCP_DEBUG_REG_RW
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/* read/write register */
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#if defined(UBWCP_USE_SMC)
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#define UBWCP_REG_READ(_base, _offset) \
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@@ -166,20 +164,20 @@ u64 ubwcp_hw_interrupt_src_address(void __iomem *base, u16 interrupt)
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switch (interrupt) {
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case INTERRUPT_READ_ERROR:
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addr_low = UBWCP_REG_READ(base, INTERRUPT_READ_SRC_LOW);
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addr_high = UBWCP_REG_READ(base, INTERRUPT_READ_SRC_HIGH) & 0xF;
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addr_low = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_READ_SRC_LOW);
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addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_READ_SRC_HIGH) & 0xF;
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break;
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case INTERRUPT_WRITE_ERROR:
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addr_low = UBWCP_REG_READ(base, INTERRUPT_WRITE_SRC_LOW);
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addr_high = UBWCP_REG_READ(base, INTERRUPT_WRITE_SRC_HIGH) & 0xF;
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addr_low = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_WRITE_SRC_LOW);
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addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_WRITE_SRC_HIGH) & 0xF;
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break;
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case INTERRUPT_DECODE_ERROR:
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addr_low = UBWCP_REG_READ(base, INTERRUPT_DECODE_SRC_LOW);
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addr_high = UBWCP_REG_READ(base, INTERRUPT_DECODE_SRC_HIGH) & 0xF;
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addr_low = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_DECODE_SRC_LOW);
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addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_DECODE_SRC_HIGH) & 0xF;
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break;
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case INTERRUPT_ENCODE_ERROR:
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addr_low = UBWCP_REG_READ(base, INTERRUPT_ENCODE_SRC_LOW);
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addr_high = UBWCP_REG_READ(base, INTERRUPT_ENCODE_SRC_HIGH) & 0xF;
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addr_low = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_ENCODE_SRC_LOW);
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addr_high = UBWCP_REG_READ_NO_DBG(base, INTERRUPT_ENCODE_SRC_HIGH) & 0xF;
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break;
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default:
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/* TBD: fatal error? */
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@@ -356,7 +354,6 @@ void ubwcp_hw_power_vote_status(void __iomem *pwr_ctrl, u8 *vote, u8 *status)
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reg = UBWCP_REG_READ(pwr_ctrl, 0);
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*vote = (reg & BIT(0)) >> 0;
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*status = (reg & BIT(31)) >> 31;
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DBG("pwr_ctrl reg: 0x%x (vote = %d status = %d)", reg, *vote, *status);
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}
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void ubwcp_hw_one_time_init(void __iomem *base)
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@@ -383,3 +380,15 @@ void ubwcp_hw_one_time_init(void __iomem *base)
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ubwcp_hw_macro_tile_config(base);
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}
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EXPORT_SYMBOL(ubwcp_hw_one_time_init);
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void ubwcp_hw_trace_set(bool value)
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{
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ubwcp_hw_trace_en = value;
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}
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EXPORT_SYMBOL(ubwcp_hw_trace_set);
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void ubwcp_hw_trace_get(bool *value)
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{
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*value = ubwcp_hw_trace_en;
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}
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EXPORT_SYMBOL(ubwcp_hw_trace_get);
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@@ -66,8 +66,7 @@ void ubwcp_hw_interrupt_enable(void __iomem *base, u16 interrupt, bool enable);
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void ubwcp_hw_power_on(void __iomem *pwr_ctrl, bool power_on);
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void ubwcp_hw_one_time_init(void __iomem *base);
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int ubwcp_hw_flush(void __iomem *base);
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//#define UBWCP_USE_SMC
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#define UBWCP_DEBUG_REG_RW
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void ubwcp_hw_trace_set(bool value);
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void ubwcp_hw_trace_get(bool *value);
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#endif /* __UBWCP_HW_H_ */
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@@ -49,8 +49,6 @@ MODULE_IMPORT_NS(DMA_BUF);
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#define UBWCP_ALIGN(_x, _y) ((((_x) + (_y) - 1)/(_y))*(_y))
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//#define DBG(fmt, args...)
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//#define DBG_BUF_ATTR(fmt, args...)
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#define DBG_BUF_ATTR(fmt, args...) do { if (ubwcp_debug_trace_enable) \
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pr_err("ubwcp: %s(): " fmt "\n", __func__, ##args); \
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} while (0)
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@@ -58,6 +56,8 @@ MODULE_IMPORT_NS(DMA_BUF);
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pr_err("ubwcp: %s(): " fmt "\n", __func__, ##args); \
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} while (0)
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#define ERR(fmt, args...) pr_err("ubwcp: %s(): ~~~ERROR~~~: " fmt "\n", __func__, ##args)
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#define ERR_RATE_LIMIT(fmt, args...) pr_err_ratelimited("ubwcp: %s(): ~~~ERROR~~~: " fmt "\n",\
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__func__, ##args)
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#define FENTRY() DBG("")
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@@ -112,6 +112,10 @@ struct ubwcp_driver {
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/* debugfs */
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struct dentry *debugfs_root;
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bool read_err_irq_en;
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bool write_err_irq_en;
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bool decode_err_irq_en;
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bool encode_err_irq_en;
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/* ubwcp devices */
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struct device *dev; //ubwcp device
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@@ -197,8 +201,7 @@ struct ubwcp_buf {
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static struct ubwcp_driver *me;
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static int error_print_count;
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u32 ubwcp_debug_trace_enable;
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static u32 ubwcp_debug_trace_enable;
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static struct ubwcp_driver *ubwcp_get_driver(void)
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{
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@@ -2109,7 +2112,6 @@ static int ubwcp_unlock(struct dma_buf *dmabuf, enum dma_data_direction dir)
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return -1;
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}
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error_print_count = 0;
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mutex_lock(&buf->lock);
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ret = unlock_internal(buf, dir, false);
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mutex_unlock(&buf->lock);
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@@ -2394,21 +2396,169 @@ static const struct file_operations ubwcp_fops = {
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.unlocked_ioctl = ubwcp_ioctl,
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};
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static int read_err_r_op(void *data, u64 *value)
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{
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struct ubwcp_driver *ubwcp = data;
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*value = ubwcp->read_err_irq_en;
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return 0;
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}
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static int ubwcp_debugfs_init(struct ubwcp_driver *ubwcp)
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static int read_err_w_op(void *data, u64 value)
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{
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struct ubwcp_driver *ubwcp = data;
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if (ubwcp_power(ubwcp, true))
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return -1;
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ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_READ_ERROR, value);
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ubwcp->read_err_irq_en = value;
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if (ubwcp_power(ubwcp, false))
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return -1;
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return 0;
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}
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static int write_err_r_op(void *data, u64 *value)
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{
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struct ubwcp_driver *ubwcp = data;
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*value = ubwcp->write_err_irq_en;
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return 0;
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}
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static int write_err_w_op(void *data, u64 value)
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{
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struct ubwcp_driver *ubwcp = data;
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if (ubwcp_power(ubwcp, true))
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return -1;
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ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_WRITE_ERROR, value);
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ubwcp->write_err_irq_en = value;
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if (ubwcp_power(ubwcp, false))
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return -1;
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return 0;
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}
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static int decode_err_r_op(void *data, u64 *value)
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{
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struct ubwcp_driver *ubwcp = data;
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*value = ubwcp->decode_err_irq_en;
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return 0;
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}
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static int decode_err_w_op(void *data, u64 value)
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{
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struct ubwcp_driver *ubwcp = data;
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if (ubwcp_power(ubwcp, true))
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return -1;
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ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_DECODE_ERROR, value);
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ubwcp->decode_err_irq_en = value;
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if (ubwcp_power(ubwcp, false))
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return -1;
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return 0;
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}
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static int encode_err_r_op(void *data, u64 *value)
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{
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struct ubwcp_driver *ubwcp = data;
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*value = ubwcp->encode_err_irq_en;
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return 0;
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}
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static int encode_err_w_op(void *data, u64 value)
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{
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struct ubwcp_driver *ubwcp = data;
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if (ubwcp_power(ubwcp, true))
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return -1;
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ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_ENCODE_ERROR, value);
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ubwcp->encode_err_irq_en = value;
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if (ubwcp_power(ubwcp, false))
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return -1;
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return 0;
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}
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static int reg_rw_trace_w_op(void *data, u64 value)
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{
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ubwcp_hw_trace_set(value);
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return 0;
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}
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static int reg_rw_trace_r_op(void *data, u64 *value)
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{
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bool trace_status;
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ubwcp_hw_trace_get(&trace_status);
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*value = trace_status;
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return 0;
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}
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DEFINE_DEBUGFS_ATTRIBUTE(read_err_fops, read_err_r_op, read_err_w_op, "%d\n");
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DEFINE_DEBUGFS_ATTRIBUTE(decode_err_fops, decode_err_r_op, decode_err_w_op, "%d\n");
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DEFINE_DEBUGFS_ATTRIBUTE(write_err_fops, write_err_r_op, write_err_w_op, "%d\n");
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DEFINE_DEBUGFS_ATTRIBUTE(encode_err_fops, encode_err_r_op, encode_err_w_op, "%d\n");
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DEFINE_DEBUGFS_ATTRIBUTE(reg_rw_trace_fops, reg_rw_trace_r_op, reg_rw_trace_w_op, "%d\n");
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static void ubwcp_debugfs_init(struct ubwcp_driver *ubwcp)
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{
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struct dentry *debugfs_root;
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struct dentry *dfile;
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debugfs_root = debugfs_create_dir("ubwcp", NULL);
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if (!debugfs_root) {
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pr_warn("Failed to create debugfs for ubwcp\n");
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return -1;
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if (IS_ERR_OR_NULL(debugfs_root)) {
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ERR("Failed to create debugfs for ubwcp\n");
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return;
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}
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debugfs_create_u32("debug_trace_enable", 0644, debugfs_root, &ubwcp_debug_trace_enable);
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dfile = debugfs_create_file("reg_rw_trace_en", 0644, debugfs_root, ubwcp, ®_rw_trace_fops);
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if (IS_ERR_OR_NULL(dfile)) {
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ERR("failed to create reg_rw_trace_en debugfs file");
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goto err;
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}
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dfile = debugfs_create_file("read_err_irq_en", 0644, debugfs_root, ubwcp, &read_err_fops);
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if (IS_ERR_OR_NULL(dfile)) {
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ERR("failed to create read_err_irq debugfs file");
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goto err;
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}
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dfile = debugfs_create_file("write_err_irq_en", 0644, debugfs_root, ubwcp, &write_err_fops);
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if (IS_ERR_OR_NULL(dfile)) {
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ERR("failed to create write_err_irq debugfs file");
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goto err;
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}
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dfile = debugfs_create_file("decode_err_irq_en", 0644, debugfs_root, ubwcp,
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&decode_err_fops);
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if (IS_ERR_OR_NULL(dfile)) {
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ERR("failed to create decode_err_irq debugfs file");
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goto err;
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}
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dfile = debugfs_create_file("encode_err_irq_en", 0644, debugfs_root, ubwcp,
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&encode_err_fops);
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if (IS_ERR_OR_NULL(dfile)) {
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ERR("failed to create encode_err_irq debugfs file");
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goto err;
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}
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ubwcp->debugfs_root = debugfs_root;
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return 0;
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return;
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err:
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debugfs_remove_recursive(ubwcp->debugfs_root);
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ubwcp->debugfs_root = NULL;
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}
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static void ubwcp_debugfs_deinit(struct ubwcp_driver *ubwcp)
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@@ -2610,9 +2760,6 @@ static struct dma_buf *get_dma_buf_from_iova(unsigned long addr)
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return ret_buf;
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}
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#define ERR_PRINT_COUNT_MAX 21
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/* TBD: use proper rate limit for debug prints */
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int ubwcp_iommu_fault_handler(struct iommu_domain *domain, struct device *dev,
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unsigned long iova, int flags, void *data)
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{
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@@ -2626,8 +2773,6 @@ int ubwcp_iommu_fault_handler(struct iommu_domain *domain, struct device *dev,
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goto err;
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}
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error_print_count++;
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if (error_print_count < ERR_PRINT_COUNT_MAX) {
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err.err_code = UBWCP_SMMU_FAULT;
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if (cb_dev == ubwcp->dev_desc_cb)
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@@ -2636,79 +2781,67 @@ int ubwcp_iommu_fault_handler(struct iommu_domain *domain, struct device *dev,
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err.smmu_err.iommu_dev_id = UBWCP_BUF_CB_ID;
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else
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err.smmu_err.iommu_dev_id = UBWCP_UNKNOWN_CB_ID;
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ERR("smmu fault error: iommu_dev_id:%d iova 0x%llx flags:0x%x",
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err.smmu_err.iommu_dev_id, iova, flags);
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err.smmu_err.dmabuf = get_dma_buf_from_iova(iova);
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err.smmu_err.iova = iova;
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err.smmu_err.iommu_fault_flags = flags;
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ERR_RATE_LIMIT("ubwcp_err: err code: %d (smmu), iommu_dev_id: %d, iova: 0x%llx, flags: 0x%x",
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err.err_code, err.smmu_err.iommu_dev_id, err.smmu_err.iova,
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err.smmu_err.iommu_fault_flags);
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ubwcp_notify_error_handlers(&err);
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}
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err:
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return ret;
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}
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irqreturn_t ubwcp_irq_handler(int irq, void *ptr)
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{
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struct ubwcp_driver *ubwcp;
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void __iomem *base;
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u64 src;
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phys_addr_t addr;
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struct ubwcp_err_info err;
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error_print_count++;
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ubwcp = (struct ubwcp_driver *) ptr;
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base = ubwcp->base;
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if (irq == ubwcp->irq_range_ck_rd) {
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if (error_print_count < ERR_PRINT_COUNT_MAX) {
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src = ubwcp_hw_interrupt_src_address(base, 0);
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addr = src << 6;
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ERR("check range read error: src: 0x%llx", addr);
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addr = ubwcp_hw_interrupt_src_address(base, 0) << 6;
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err.err_code = UBWCP_RANGE_TRANSLATION_ERROR;
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err.translation_err.dmabuf = get_dma_buf_from_ulapa(addr);
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err.translation_err.ula_pa = addr;
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err.translation_err.read = true;
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ERR_RATE_LIMIT("ubwcp_err: err code: %d (range), dmabuf: 0x%llx, read: %d, addr: 0x%llx",
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err.err_code, err.translation_err.dmabuf, err.translation_err.read, addr);
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ubwcp_notify_error_handlers(&err);
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}
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ubwcp_hw_interrupt_clear(ubwcp->base, 0);
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} else if (irq == ubwcp->irq_range_ck_wr) {
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if (error_print_count < ERR_PRINT_COUNT_MAX) {
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src = ubwcp_hw_interrupt_src_address(base, 1);
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addr = src << 6;
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ERR("check range write error: src: 0x%llx", addr);
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addr = ubwcp_hw_interrupt_src_address(base, 1) << 6;
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err.err_code = UBWCP_RANGE_TRANSLATION_ERROR;
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err.translation_err.dmabuf = get_dma_buf_from_ulapa(addr);
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err.translation_err.ula_pa = addr;
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err.translation_err.read = false;
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ERR_RATE_LIMIT("ubwcp_err: err code: %d (range), dmabuf: 0x%llx, read: %d, addr: 0x%llx",
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err.err_code, err.translation_err.dmabuf, err.translation_err.read, addr);
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ubwcp_notify_error_handlers(&err);
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}
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ubwcp_hw_interrupt_clear(ubwcp->base, 1);
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} else if (irq == ubwcp->irq_encode) {
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if (error_print_count < ERR_PRINT_COUNT_MAX) {
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src = ubwcp_hw_interrupt_src_address(base, 3);
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addr = src << 6;
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ERR("encode error: src: 0x%llx", addr);
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addr = ubwcp_hw_interrupt_src_address(base, 3) << 6;
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err.err_code = UBWCP_ENCODE_ERROR;
|
||||
err.enc_err.dmabuf = get_dma_buf_from_ulapa(addr);
|
||||
err.enc_err.ula_pa = addr;
|
||||
ERR_RATE_LIMIT("ubwcp_err: err code: %d (encode), dmabuf: 0x%llx, addr: 0x%llx",
|
||||
err.err_code, err.enc_err.dmabuf, addr);
|
||||
ubwcp_notify_error_handlers(&err);
|
||||
}
|
||||
ubwcp_hw_interrupt_clear(ubwcp->base, 3); //TBD: encode is bit-3 instead of bit-2
|
||||
ubwcp_hw_interrupt_clear(ubwcp->base, 3);
|
||||
} else if (irq == ubwcp->irq_decode) {
|
||||
if (error_print_count < ERR_PRINT_COUNT_MAX) {
|
||||
src = ubwcp_hw_interrupt_src_address(base, 2);
|
||||
addr = src << 6;
|
||||
ERR("decode error: src: 0x%llx", addr);
|
||||
addr = ubwcp_hw_interrupt_src_address(base, 2) << 6;
|
||||
err.err_code = UBWCP_DECODE_ERROR;
|
||||
err.dec_err.dmabuf = get_dma_buf_from_ulapa(addr);
|
||||
err.dec_err.ula_pa = addr;
|
||||
ERR_RATE_LIMIT("ubwcp_err: err code: %d (decode), dmabuf: 0x%llx, addr: 0x%llx",
|
||||
err.err_code, err.enc_err.dmabuf, addr);
|
||||
ubwcp_notify_error_handlers(&err);
|
||||
}
|
||||
ubwcp_hw_interrupt_clear(ubwcp->base, 2); //TBD: decode is bit-2 instead of bit-3
|
||||
ubwcp_hw_interrupt_clear(ubwcp->base, 2);
|
||||
} else {
|
||||
ERR("unknown irq: %d", irq);
|
||||
return IRQ_NONE;
|
||||
@@ -2839,9 +2972,6 @@ static int qcom_ubwcp_probe(struct platform_device *pdev)
|
||||
mutex_init(&ubwcp->hw_range_ck_lock);
|
||||
spin_lock_init(&ubwcp->err_handler_list_lock);
|
||||
|
||||
if (ubwcp_interrupt_register(pdev, ubwcp))
|
||||
return -1;
|
||||
|
||||
/* Regulator */
|
||||
ubwcp->vdd = devm_regulator_get(ubwcp_dev, "vdd");
|
||||
if (IS_ERR_OR_NULL(ubwcp->vdd)) {
|
||||
@@ -2862,9 +2992,17 @@ static int qcom_ubwcp_probe(struct platform_device *pdev)
|
||||
if (ubwcp_cdev_init(ubwcp))
|
||||
return -1;
|
||||
|
||||
if (ubwcp_debugfs_init(ubwcp))
|
||||
/* disable all interrupts (reset value has some interrupts enabled by default) */
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_READ_ERROR, false);
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_WRITE_ERROR, false);
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_ENCODE_ERROR, false);
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_DECODE_ERROR, false);
|
||||
|
||||
if (ubwcp_interrupt_register(pdev, ubwcp))
|
||||
return -1;
|
||||
|
||||
ubwcp_debugfs_init(ubwcp);
|
||||
|
||||
/* create ULA pool */
|
||||
ubwcp->ula_pool = gen_pool_create(12, -1);
|
||||
if (!ubwcp->ula_pool) {
|
||||
@@ -2900,11 +3038,16 @@ static int qcom_ubwcp_probe(struct platform_device *pdev)
|
||||
/* set pdev->dev->driver_data = ubwcp */
|
||||
platform_set_drvdata(pdev, ubwcp);
|
||||
|
||||
/* enable all 4 interrupts */
|
||||
|
||||
/* enable interrupts */
|
||||
if (ubwcp->read_err_irq_en)
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_READ_ERROR, true);
|
||||
if (ubwcp->write_err_irq_en)
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_WRITE_ERROR, true);
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_ENCODE_ERROR, true);
|
||||
if (ubwcp->decode_err_irq_en)
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_DECODE_ERROR, true);
|
||||
if (ubwcp->encode_err_irq_en)
|
||||
ubwcp_hw_interrupt_enable(ubwcp->base, INTERRUPT_ENCODE_ERROR, true);
|
||||
|
||||
/* Turn OFF until buffers are allocated */
|
||||
if (ubwcp_power(ubwcp, false)) {
|
||||
|
Reference in New Issue
Block a user