samsung-sm8650/android_kernel_samsung_sm8650-modules
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

disp: msm: sde: add fence ready in event log

Browse Source 
This change adds the value of hw-fence ready to
event logs for video and command modes.

Change-Id: I40a2e886a3b95e8853efcbdddf7fd9f6ce48eb9b
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
This commit is contained in:
Christina Oliveira
2022-05-02 10:50:23 -07:00
parent 0e20e27cc1
commit d3104b1f9f
4 changed files with 29 additions and 6 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
msm/sde/sde_encoder_phys_cmd.c
View File

@@ -269,15 +269,16 @@ static void sde_encoder_phys_cmd_te_rd_ptr_irq(void *arg, int irq_idx)
struct sde_hw_pp_vsync_info info[MAX_CHANNELS_PER_ENC] = {{0}}; struct sde_hw_pp_vsync_info info[MAX_CHANNELS_PER_ENC] = {{0}};
struct sde_encoder_phys_cmd_te_timestamp *te_timestamp; struct sde_encoder_phys_cmd_te_timestamp *te_timestamp;
unsigned long lock_flags; unsigned long lock_flags;
u32 fence_ready = 0;
if (!phys_enc || !phys_enc->hw_pp || !phys_enc->hw_intf) if (!phys_enc || !phys_enc->hw_pp || !phys_enc->hw_intf || !phys_enc->hw_ctl)
return; return;
SDE_ATRACE_BEGIN("rd_ptr_irq"); SDE_ATRACE_BEGIN("rd_ptr_irq");
cmd_enc = to_sde_encoder_phys_cmd(phys_enc); cmd_enc = to_sde_encoder_phys_cmd(phys_enc);
ctl = phys_enc->hw_ctl; ctl = phys_enc->hw_ctl;
if (ctl && ctl->ops.get_scheduler_status) if (ctl->ops.get_scheduler_status)
scheduler_status = ctl->ops.get_scheduler_status(ctl); scheduler_status = ctl->ops.get_scheduler_status(ctl);
spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags); spin_lock_irqsave(phys_enc->enc_spinlock, lock_flags);
@@ -290,13 +291,16 @@ static void sde_encoder_phys_cmd_te_rd_ptr_irq(void *arg, int irq_idx)
} }
spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
if ((scheduler_status != 0x1) && ctl->ops.get_hw_fence_status)
fence_ready = ctl->ops.get_hw_fence_status(ctl);
sde_encoder_helper_get_pp_line_count(phys_enc->parent, info); sde_encoder_helper_get_pp_line_count(phys_enc->parent, info);
SDE_EVT32_IRQ(DRMID(phys_enc->parent), SDE_EVT32_IRQ(DRMID(phys_enc->parent),
info[0].pp_idx, info[0].intf_idx, info[0].pp_idx, info[0].intf_idx,
info[0].wr_ptr_line_count, info[0].intf_frame_count, info[0].wr_ptr_line_count, info[0].intf_frame_count,
info[1].pp_idx, info[1].intf_idx, info[1].pp_idx, info[1].intf_idx,
info[1].wr_ptr_line_count, info[1].intf_frame_count, info[1].wr_ptr_line_count, info[1].intf_frame_count,
scheduler_status); scheduler_status, fence_ready);
if (phys_enc->parent_ops.handle_vblank_virt) if (phys_enc->parent_ops.handle_vblank_virt)
phys_enc->parent_ops.handle_vblank_virt(phys_enc->parent, phys_enc->parent_ops.handle_vblank_virt(phys_enc->parent,

11
msm/sde/sde_encoder_phys_vid.c
View File

@@ -491,6 +491,7 @@ static void sde_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
int new_cnt = -1, old_cnt = -1; int new_cnt = -1, old_cnt = -1;
u32 event = 0; u32 event = 0;
int pend_ret_fence_cnt = 0; int pend_ret_fence_cnt = 0;
u32 fence_ready = -1;
if (!phys_enc) if (!phys_enc)
return; return;
@@ -510,7 +511,7 @@ static void sde_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
old_cnt = atomic_read(&phys_enc->pending_kickoff_cnt); old_cnt = atomic_read(&phys_enc->pending_kickoff_cnt);
if (hw_ctl && hw_ctl->ops.get_flush_register) if (hw_ctl->ops.get_flush_register)
flush_register = hw_ctl->ops.get_flush_register(hw_ctl); flush_register = hw_ctl->ops.get_flush_register(hw_ctl);
if (flush_register) if (flush_register)
@@ -528,7 +529,7 @@ static void sde_encoder_phys_vid_vblank_irq(void *arg, int irq_idx)
} }
not_flushed: not_flushed:
if (hw_ctl && hw_ctl->ops.get_reset) if (hw_ctl->ops.get_reset)
reset_status = hw_ctl->ops.get_reset(hw_ctl); reset_status = hw_ctl->ops.get_reset(hw_ctl);
spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags); spin_unlock_irqrestore(phys_enc->enc_spinlock, lock_flags);
@@ -545,12 +546,16 @@ not_flushed:
phys_enc->hw_intf->ops.get_status(phys_enc->hw_intf, phys_enc->hw_intf->ops.get_status(phys_enc->hw_intf,
&intf_status); &intf_status);
if (flush_register && hw_ctl->ops.get_hw_fence_status)
fence_ready = hw_ctl->ops.get_hw_fence_status(hw_ctl);
SDE_EVT32_IRQ(DRMID(phys_enc->parent), phys_enc->hw_intf->idx - INTF_0, SDE_EVT32_IRQ(DRMID(phys_enc->parent), phys_enc->hw_intf->idx - INTF_0,
old_cnt, atomic_read(&phys_enc->pending_kickoff_cnt), old_cnt, atomic_read(&phys_enc->pending_kickoff_cnt),
reset_status ? SDE_EVTLOG_ERROR : 0, reset_status ? SDE_EVTLOG_ERROR : 0,
flush_register, event, flush_register, event,
atomic_read(&phys_enc->pending_retire_fence_cnt), atomic_read(&phys_enc->pending_retire_fence_cnt),
intf_status.frame_count, intf_status.line_count); intf_status.frame_count, intf_status.line_count,
fence_ready);
/* Signal any waiting atomic commit thread */ /* Signal any waiting atomic commit thread */
wake_up_all(&phys_enc->pending_kickoff_wq); wake_up_all(&phys_enc->pending_kickoff_wq);

7
msm/sde/sde_hw_ctl.c
View File

@@ -59,6 +59,7 @@
#define CTL_INPUT_FENCE_ID 0x258 #define CTL_INPUT_FENCE_ID 0x258
#define CTL_OUTPUT_FENCE_CTRL 0x25C #define CTL_OUTPUT_FENCE_CTRL 0x25C
#define CTL_OUTPUT_FENCE_ID 0x260 #define CTL_OUTPUT_FENCE_ID 0x260
#define CTL_HW_FENCE_STATUS 0x278
#define CTL_MIXER_BORDER_OUT BIT(24) #define CTL_MIXER_BORDER_OUT BIT(24)
#define CTL_FLUSH_MASK_ROT BIT(27) #define CTL_FLUSH_MASK_ROT BIT(27)
@@ -340,6 +341,11 @@ static inline void sde_hw_ctl_update_output_fence(struct sde_hw_ctl *ctx,
SDE_REG_WRITE(&ctx->hw, CTL_OUTPUT_FENCE_ID, val); SDE_REG_WRITE(&ctx->hw, CTL_OUTPUT_FENCE_ID, val);
} }
static inline int sde_hw_ctl_get_hw_fence_status(struct sde_hw_ctl *ctx)
{
return SDE_REG_READ(&ctx->hw, CTL_HW_FENCE_STATUS);
}
static inline void sde_hw_ctl_trigger_output_fence(struct sde_hw_ctl *ctx, u32 trigger_sel) static inline void sde_hw_ctl_trigger_output_fence(struct sde_hw_ctl *ctx, u32 trigger_sel)
{ {
u32 val = ((trigger_sel & 0xF) << 4) | 0x1; u32 val = ((trigger_sel & 0xF) << 4) | 0x1;
@@ -1419,6 +1425,7 @@ static void _setup_ctl_ops(struct sde_hw_ctl_ops *ops,
ops->hw_fence_trigger_output_fence = sde_hw_ctl_trigger_output_fence; ops->hw_fence_trigger_output_fence = sde_hw_ctl_trigger_output_fence;
ops->hw_fence_ctrl = sde_hw_ctl_hw_fence_ctrl; ops->hw_fence_ctrl = sde_hw_ctl_hw_fence_ctrl;
ops->hw_fence_trigger_sw_override = sde_hw_ctl_trigger_sw_override; ops->hw_fence_trigger_sw_override = sde_hw_ctl_trigger_sw_override;
ops->get_hw_fence_status = sde_hw_ctl_get_hw_fence_status;
} }
if (cap & BIT(SDE_CTL_UIDLE)) if (cap & BIT(SDE_CTL_UIDLE))

7
msm/sde/sde_hw_ctl.h
View File

@@ -190,6 +190,13 @@ struct sde_hw_ctl_ops {
*/ */
void (*hw_fence_trigger_output_fence)(struct sde_hw_ctl *ctx, u32 trigger_sel); void (*hw_fence_trigger_output_fence)(struct sde_hw_ctl *ctx, u32 trigger_sel);
/**
* get hw fence status
* @ctx : ctl path ctx pointer
* @Return: fence status
*/
int (*get_hw_fence_status)(struct sde_hw_ctl *ctx);
/** /**
* update output hw fence ipcc client_id and signal_id * update output hw fence ipcc client_id and signal_id
* @ctx : ctl path ctx pointer * @ctx : ctl path ctx pointer