msm: camera: common: memset usage optimization
Remove unnecessary memsets of the structure variables whose fields are assigned prior to their usage or they are dynamically allocated with calls that set the memory to 0. This memset usage optimization is to improve performance. CRs-Fixed: 3228092 Change-Id: Iec68c6d072863627959ce603cff28afd26a1c408 Signed-off-by: Sokchetra Eung <quic_eung@quicinc.com>
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Camera Software Integration

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d2a1f0c968
@@ -2406,7 +2406,7 @@ static int __cam_isp_ctx_apply_pending_req(
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struct cam_isp_context *ctx_isp = priv;
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struct cam_ctx_request *req;
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struct cam_isp_ctx_req *req_isp;
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struct cam_hw_config_args cfg;
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struct cam_hw_config_args cfg = {0};
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if (!ctx_isp) {
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CAM_ERR(CAM_ISP, "Invalid ctx_isp:%pK", ctx);
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@@ -2447,14 +2447,11 @@ static int __cam_isp_ctx_apply_pending_req(
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req->request_id, ctx_isp->substate_activated, ctx->ctx_id);
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req_isp = (struct cam_isp_ctx_req *) req->req_priv;
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memset(&cfg, 0, sizeof(cfg));
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cfg.ctxt_to_hw_map = ctx_isp->hw_ctx;
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cfg.request_id = req->request_id;
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cfg.hw_update_entries = req_isp->cfg;
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cfg.num_hw_update_entries = req_isp->num_cfg;
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cfg.priv = &req_isp->hw_update_data;
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cfg.init_packet = 0;
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cfg.priv = &req_isp->hw_update_data;
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/*
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* Offline mode may receive the SOF and REG_UPD earlier than
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@@ -9860,8 +9860,6 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
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prepare_hw_data = (struct cam_isp_prepare_hw_update_data *) prepare->priv;
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memset(&prepare_hw_data->bw_clk_config.bw_config_v2, 0,
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sizeof(prepare_hw_data->bw_clk_config.bw_config_v2));
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prepare_hw_data->bw_clk_config.bw_config_v2.usage_type = bw_config->usage_type;
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prepare_hw_data->bw_clk_config.bw_config_v2.num_paths = bw_config->num_paths;
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@@ -9930,8 +9928,7 @@ static int cam_isp_packet_generic_blob_handler(void *user_data,
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}
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prepare_hw_data = (struct cam_isp_prepare_hw_update_data *) prepare->priv;
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memset(&prepare_hw_data->bw_clk_config.bw_config_v2, 0,
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sizeof(prepare_hw_data->bw_clk_config.bw_config_v2));
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prepare_hw_data->bw_clk_config.bw_config_v2.usage_type = bw_config->usage_type;
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prepare_hw_data->bw_clk_config.bw_config_v2.num_paths = bw_config->num_paths;
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@@ -10837,7 +10834,6 @@ static int cam_isp_sfe_send_scratch_buf_upd(
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struct cam_isp_hw_get_wm_update wm_update;
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dma_addr_t io_addr[CAM_PACKET_MAX_PLANES];
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memset(io_addr, 0, sizeof(io_addr));
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update_buf.res = hw_res;
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update_buf.cmd_type = cmd_type;
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update_buf.cmd.cmd_buf_addr = cpu_addr;
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@@ -14755,8 +14751,6 @@ int cam_ife_hw_mgr_init(struct cam_hw_mgr_intf *hw_mgr_intf, int *iommu_hdl)
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atomic_set(&g_ife_hw_mgr.active_ctx_cnt, 0);
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for (i = 0; i < CAM_IFE_CTX_MAX; i++) {
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memset(&g_ife_hw_mgr.ctx_pool[i], 0,
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sizeof(g_ife_hw_mgr.ctx_pool[i]));
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INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].list);
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INIT_LIST_HEAD(&g_ife_hw_mgr.ctx_pool[i].res_list_ife_in.list);
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@@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <media/cam_defs.h>
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@@ -1758,7 +1759,7 @@ int cam_isp_add_csid_reg_update(
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(kmd_buf_info->used_bytes +
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reg_update_size);
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memset(&rup_args->cmd, 0, sizeof(struct cam_isp_hw_cmd_buf_update));
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rup_args->cmd.used_bytes = 0;
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rup_args->cmd.cmd_buf_addr = kmd_buf_info->cpu_addr +
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kmd_buf_info->used_bytes/4 +
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reg_update_size/4;
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@@ -1919,7 +1920,6 @@ int cam_isp_get_cmd_buf_count(
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((uint8_t *)&prepare->packet->payload +
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prepare->packet->cmd_buf_offset);
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memset(cmd_buf_count, 0, sizeof(struct cam_isp_cmd_buf_count));
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for (i = 0; i < prepare->packet->num_cmd_buf; i++) {
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if (!cmd_desc[i].length)
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continue;
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@@ -1134,7 +1134,7 @@ static int cam_ife_csid_ver2_rx_err_bottom_half(
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data_idx = csid_hw->rx_cfg.phy_sel -1;
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log_buf = csid_hw->log_buf;
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memset(log_buf, 0, sizeof(csid_hw->log_buf));
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log_buf[0] = '\0';
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csid_reg = (struct cam_ife_csid_ver2_reg_info *)
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csid_hw->core_info->csid_reg;
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@@ -1532,7 +1532,6 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
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csid_hw->core_info->csid_reg;
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log_buf = csid_hw->log_buf;
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memset(log_buf, 0, sizeof(csid_hw->log_buf));
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irq_reg_tag = cam_ife_csid_get_irq_reg_tag_ptr();
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@@ -91,7 +91,6 @@ int cam_ife_csid_init_soc_resources(struct cam_hw_soc_info *soc_info,
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goto free_soc_private;
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}
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memset(&cpas_register_param, 0, sizeof(cpas_register_param));
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if (is_custom)
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strlcpy(cpas_register_param.identifier, "csid-custom",
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CAM_HW_IDENTIFIER_LENGTH);
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@@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
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* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <linux/slab.h>
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@@ -107,7 +108,6 @@ int cam_sfe_init_soc_resources(struct cam_hw_soc_info *soc_info,
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goto free_soc_private;
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}
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memset(&cpas_register_param, 0, sizeof(cpas_register_param));
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strlcpy(cpas_register_param.identifier, "sfe",
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CAM_HW_IDENTIFIER_LENGTH);
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cpas_register_param.cell_index = soc_info->index;
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@@ -245,7 +245,6 @@ static void cam_sfe_top_check_module_status(
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i, log_buf);
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len = 0;
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found = false;
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memset(log_buf, 0, sizeof(uint8_t)*1024);
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}
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}
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@@ -1944,14 +1943,7 @@ int cam_sfe_top_init(
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goto free_top_priv;
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}
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top_priv->applied_clk_rate = 0;
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top_priv->reserve_cnt = 0;
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top_priv->start_stop_cnt = 0;
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top_priv->priv_per_stream = NULL;
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top_priv->event_cb = NULL;
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top_priv->num_in_ports = sfe_top_hw_info->num_inputs;
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memset(&top_priv->core_cfg, 0x0,
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sizeof(struct cam_sfe_core_cfg));
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CAM_DBG(CAM_SFE,
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"Initializing SFE [%u] top with hw_version: 0x%x",
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@@ -180,7 +180,6 @@ int cam_vfe_init_soc_resources(struct cam_hw_soc_info *soc_info,
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goto free_soc_private;
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}
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memset(&cpas_register_param, 0, sizeof(cpas_register_param));
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strlcpy(cpas_register_param.identifier, "ife",
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CAM_HW_IDENTIFIER_LENGTH);
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cpas_register_param.cell_index = soc_info->index;
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@@ -1054,9 +1054,7 @@ static int cam_vfe_bus_ver3_acquire_wm(
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{
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int32_t wm_idx = 0, rc;
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struct cam_vfe_bus_ver3_wm_resource_data *rsrc_data = NULL;
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char wm_mode[50];
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memset(wm_mode, '\0', sizeof(wm_mode));
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char wm_mode[50] = {'\0'};
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if (wm_res->res_state != CAM_ISP_RESOURCE_STATE_AVAILABLE) {
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CAM_ERR(CAM_ISP, "WM:%d not available state:%d",
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@@ -446,7 +446,6 @@ static void cam_vfe_top_ver4_print_debug_reg_status(
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}
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CAM_INFO(CAM_ISP, "VFE[%u]: Top Debug Status: %s", soc_info->index, log_buf);
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len = 0;
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memset(log_buf, 0, sizeof(uint8_t)*CAM_VFE_LEN_LOG_BUF);
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}
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cam_vfe_top_ver4_check_module_status(num_reg, reg_val,
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