qcacmn: Add support for VOW Reo and Rxdma error statistics

Support for Rx REO and Rxdma error statistics for version 3

Change-Id: I2a558f62d6d7b66658bb064810d0ea13528d9a28
This commit is contained in:
Shivani Soni
2021-06-24 15:08:09 +05:30
committed by Gerrit - the friendly Code Review server
parent 92ba4703ca
commit d06d841dc6
4 changed files with 90 additions and 1 deletions

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@@ -78,6 +78,9 @@
#define CDP_MAX_TX_TQM_STATUS 9 /* max tx tqm completion status */ #define CDP_MAX_TX_TQM_STATUS 9 /* max tx tqm completion status */
#define CDP_MAX_TX_HTT_STATUS 7 /* max tx htt completion status */ #define CDP_MAX_TX_HTT_STATUS 7 /* max tx htt completion status */
#define CDP_DMA_CODE_MAX 14 /* max rxdma error */
#define CDP_REO_CODE_MAX 15 /* max reo error */
/* /*
* Max of TxRx context * Max of TxRx context
*/ */
@@ -114,6 +117,7 @@
*/ */
#define CDP_PPDU_STATS_MAX_TAG 14 #define CDP_PPDU_STATS_MAX_TAG 14
#define CDP_MAX_DATA_TIDS 9 #define CDP_MAX_DATA_TIDS 9
#define CDP_MAX_VOW_TID 4
#define CDP_WDI_NUM_EVENTS WDI_NUM_EVENTS #define CDP_WDI_NUM_EVENTS WDI_NUM_EVENTS
@@ -640,6 +644,26 @@ struct cdp_tid_tx_stats {
uint64_t htt_status_cnt[CDP_MAX_TX_HTT_STATUS]; uint64_t htt_status_cnt[CDP_MAX_TX_HTT_STATUS];
}; };
/*
* cdp_reo_error_stats
* @err_src_reo_code_inv: Wireless Buffer Manager source receive reorder ring reason unknown
* @err_reo_codes: Receive reoder error codes
*/
struct cdp_reo_error_stats {
uint64_t err_src_reo_code_inv;
uint64_t err_reo_codes[CDP_REO_CODE_MAX];
};
/*
* cdp_rxdma_error_stats
* @err_src_rxdma_code_inv: DMA reason unknown count
* @err_reo_codes: Receive reoder error codes count
*/
struct cdp_rxdma_error_stats {
uint64_t err_src_rxdma_code_inv;
uint64_t err_dma_codes[CDP_DMA_CODE_MAX];
};
/* /*
* struct cdp_tid_tx_stats * struct cdp_tid_tx_stats
* @to_stack_delay: Time taken between ring reap to indication to network stack * @to_stack_delay: Time taken between ring reap to indication to network stack
@@ -650,6 +674,8 @@ struct cdp_tid_tx_stats {
* @mcast_msdu_cnt: Num Mcast Msdus received from HW in Rx * @mcast_msdu_cnt: Num Mcast Msdus received from HW in Rx
* @bcast_msdu_cnt: Num Bcast Msdus received from HW in Rx * @bcast_msdu_cnt: Num Bcast Msdus received from HW in Rx
* @fail_cnt: Rx deliver drop counters * @fail_cnt: Rx deliver drop counters
* @reo_err: V3 reo error statistics
* @rxdma_err: V3 rxdma error statistics
*/ */
struct cdp_tid_rx_stats { struct cdp_tid_rx_stats {
struct cdp_delay_stats to_stack_delay; struct cdp_delay_stats to_stack_delay;
@@ -660,6 +686,8 @@ struct cdp_tid_rx_stats {
uint64_t mcast_msdu_cnt; uint64_t mcast_msdu_cnt;
uint64_t bcast_msdu_cnt; uint64_t bcast_msdu_cnt;
uint64_t fail_cnt[RX_MAX_DROP]; uint64_t fail_cnt[RX_MAX_DROP];
struct cdp_reo_error_stats reo_err;
struct cdp_rxdma_error_stats rxdma_err;
}; };
/* /*

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@@ -2411,6 +2411,14 @@ void dp_pdev_print_delay_stats(struct dp_pdev *pdev);
* Return:void * Return:void
*/ */
void dp_pdev_print_tid_stats(struct dp_pdev *pdev); void dp_pdev_print_tid_stats(struct dp_pdev *pdev);
/**
* dp_pdev_print_rx_error_stats(): Print pdev level rx error stats
* @pdev: DP_PDEV handle
*
* Return:void
*/
void dp_pdev_print_rx_error_stats(struct dp_pdev *pdev);
#endif /* CONFIG_WIN */ #endif /* CONFIG_WIN */
void dp_soc_set_txrx_ring_map(struct dp_soc *soc); void dp_soc_set_txrx_ring_map(struct dp_soc *soc);

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@@ -10477,6 +10477,8 @@ static uint32_t dp_tx_flow_ctrl_configure_pdev(struct cdp_soc_t *soc_handle,
dp_pdev_print_tid_stats(pdev); dp_pdev_print_tid_stats(pdev);
qdf_print("------ Delay Stats ------\n"); qdf_print("------ Delay Stats ------\n");
dp_pdev_print_delay_stats(pdev); dp_pdev_print_delay_stats(pdev);
qdf_print("------ Rx Error Stats ------\n");
dp_pdev_print_rx_error_stats(pdev);
break; break;
#endif #endif
case DP_PARAM_TOTAL_Q_SIZE: case DP_PARAM_TOTAL_Q_SIZE:

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@@ -172,6 +172,7 @@ const char *intfrm_delay_bucket[CDP_DELAY_BUCKET_MAX + 1] = {
#define TID_COUNTER_STATS 1 /* Success/drop stats type */ #define TID_COUNTER_STATS 1 /* Success/drop stats type */
#define TID_DELAY_STATS 2 /* Delay stats type */ #define TID_DELAY_STATS 2 /* Delay stats type */
#define TID_RX_ERROR_STATS 3 /* Rx Error stats type */
/* /*
* dp_print_stats_string_tlv: display htt_stats_string_tlv * dp_print_stats_string_tlv: display htt_stats_string_tlv
@@ -4421,7 +4422,7 @@ dp_accumulate_tid_stats(struct dp_pdev *pdev, uint8_t tid,
struct cdp_tid_tx_stats *total_tx, struct cdp_tid_tx_stats *total_tx,
struct cdp_tid_rx_stats *total_rx, uint8_t type) struct cdp_tid_rx_stats *total_rx, uint8_t type)
{ {
uint8_t ring_id = 0, drop = 0, tqm_status_idx = 0, htt_status_idx = 0; uint8_t i = 0, ring_id = 0, drop = 0, tqm_status_idx = 0, htt_status_idx = 0;
struct cdp_tid_stats *tid_stats = &pdev->stats.tid_stats; struct cdp_tid_stats *tid_stats = &pdev->stats.tid_stats;
struct cdp_tid_tx_stats *per_ring_tx = NULL; struct cdp_tid_tx_stats *per_ring_tx = NULL;
struct cdp_tid_rx_stats *per_ring_rx = NULL; struct cdp_tid_rx_stats *per_ring_rx = NULL;
@@ -4493,6 +4494,22 @@ dp_accumulate_tid_stats(struct dp_pdev *pdev, uint8_t tid,
break; break;
} }
case TID_RX_ERROR_STATS:
{
for (ring_id = 0; ring_id < CDP_MAX_RX_RINGS; ring_id++) {
per_ring_rx = &tid_stats->tid_rx_stats[ring_id][tid];
total_rx->reo_err.err_src_reo_code_inv += per_ring_rx->reo_err.err_src_reo_code_inv;
for (i = 0; i < CDP_REO_CODE_MAX; i++) {
total_rx->reo_err.err_reo_codes[i] += per_ring_rx->reo_err.err_reo_codes[i];
}
total_rx->rxdma_err.err_src_rxdma_code_inv += per_ring_rx->rxdma_err.err_src_rxdma_code_inv;
for (i = 0; i < CDP_DMA_CODE_MAX; i++) {
total_rx->rxdma_err.err_dma_codes[i] += per_ring_rx->rxdma_err.err_dma_codes[i];
}
}
break;
}
default: default:
qdf_err("Invalid stats type"); qdf_err("Invalid stats type");
break; break;
@@ -4662,6 +4679,40 @@ void dp_pdev_print_delay_stats(struct dp_pdev *pdev)
DP_PRINT_STATS("Avg = %u\n", total_rx.to_stack_delay.avg_delay); DP_PRINT_STATS("Avg = %u\n", total_rx.to_stack_delay.avg_delay);
} }
} }
void dp_pdev_print_rx_error_stats(struct dp_pdev *pdev)
{
struct dp_soc *soc = pdev->soc;
struct cdp_tid_rx_stats total_rx;
struct cdp_tid_tx_stats total_tx;
struct cdp_tid_stats *tid_stats;
uint8_t tid, index;
if (!soc)
return;
tid_stats = &pdev->stats.tid_stats;
DP_PRINT_STATS("Per TID RX Error Stats:\n");
for (tid = 0; tid < CDP_MAX_VOW_TID; tid++) {
dp_accumulate_tid_stats(pdev, tid, &total_tx, &total_rx,
TID_RX_ERROR_STATS);
DP_PRINT_STATS("----TID: %d----", tid + 4);
DP_PRINT_STATS("Rx REO Error stats:");
DP_PRINT_STATS("err_src_reo_code_inv = %llu", total_rx.reo_err.err_src_reo_code_inv);
for (index = 0; index < CDP_REO_CODE_MAX; index++) {
DP_PRINT_STATS("err src reo codes: %d = %llu", index, total_rx.reo_err.err_reo_codes[index]);
}
DP_PRINT_STATS("Rx Rxdma Error stats:");
DP_PRINT_STATS("err_src_rxdma_code_inv = %llu", total_rx.rxdma_err.err_src_rxdma_code_inv);
for (index = 0; index < CDP_DMA_CODE_MAX; index++) {
DP_PRINT_STATS("err src dma codes: %d = %llu", index, total_rx.rxdma_err.err_dma_codes[index]);
}
}
}
#endif #endif
void dp_print_soc_cfg_params(struct dp_soc *soc) void dp_print_soc_cfg_params(struct dp_soc *soc)