qcacmn: Separate hal for qca6290 and qca8074
Create separate individual hal_srng_table and hal register offset in target specific source files. Create separate functions for qca6290 and qca8074 for few hal rx tx functions as the macro value differs between the chipsets. Assign target specific hal tx, rx ops as part of hal_attach and call respective hal tx, rx ops through callbacks. Change-Id: Ibbf490c678c39fdd9d54191aad7aaec786db30ec
Esse commit está contido em:
Balamurugan Mahalingam
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nshrivas
nshrivas
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8ae6415cba
commit
d0159640ea
188
hal/wifi3.0/qca6290/hal_6290_tx.h
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188
hal/wifi3.0/qca6290/hal_6290_tx.h
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/*
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* Copyright (c) 2018 The Linux Foundation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met:
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* * Neither the name of The Linux Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
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* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
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* OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
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* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "tcl_data_cmd.h"
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#include "mac_tcl_reg_seq_hwioreg.h"
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#include "phyrx_rssi_legacy.h"
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#include "hal_hw_headers.h"
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#include "hal_internal.h"
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#include "cdp_txrx_mon_struct.h"
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#include "qdf_trace.h"
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#include "hal_rx.h"
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#include "hal_tx.h"
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#include "dp_types.h"
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#include "hal_api_mon.h"
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/**
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* hal_tx_desc_set_dscp_tid_table_id_6290() - Sets DSCP to TID conversion
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* table ID
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* @desc: Handle to Tx Descriptor
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* @id: DSCP to tid conversion table to be used for this frame
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*
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* Return: void
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*/
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void hal_tx_desc_set_dscp_tid_table_id_6290(void *desc,
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uint8_t id)
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{
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HAL_SET_FLD(desc, TCL_DATA_CMD_5,
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DSCP_TID_TABLE_NUM) |=
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HAL_TX_SM(TCL_DATA_CMD_5,
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DSCP_TID_TABLE_NUM, id);
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}
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qdf_export_symbol(hal_tx_desc_set_dscp_tid_table_id_6290);
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#define DSCP_TID_TABLE_SIZE 24
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#define NUM_WORDS_PER_DSCP_TID_TABLE (DSCP_TID_TABLE_SIZE / 4)
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/**
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* hal_tx_set_dscp_tid_map_6290() - Configure default DSCP to TID map table
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* @soc: HAL SoC context
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* @map: DSCP-TID mapping table
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* @id: mapping table ID - 0-31
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*
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* DSCP are mapped to 8 TID values using TID values programmed
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* in any of the 32 DSCP_TID_MAPS (id = 0-31).
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*
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* Return: none
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*/
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void hal_tx_set_dscp_tid_map_6290(void *hal_soc, uint8_t *map,
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uint8_t id)
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{
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int i;
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uint32_t addr, cmn_reg_addr;
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uint32_t value = 0, regval;
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uint8_t val[DSCP_TID_TABLE_SIZE], cnt = 0;
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struct hal_soc *soc = (struct hal_soc *)hal_soc;
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if (id >= HAL_MAX_HW_DSCP_TID_MAPS_11AX)
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return;
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cmn_reg_addr = HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_ADDR(
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SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET);
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addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
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SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET,
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id * NUM_WORDS_PER_DSCP_TID_TABLE);
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/* Enable read/write access */
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regval = HAL_REG_READ(soc, cmn_reg_addr);
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regval |=
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(1 << HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_SHFT);
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HAL_REG_WRITE(soc, cmn_reg_addr, regval);
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/* Write 8 (24 bits) DSCP-TID mappings in each interation */
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for (i = 0; i < 64; i += 8) {
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value = (map[i] |
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(map[i + 1] << 0x3) |
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(map[i + 2] << 0x6) |
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(map[i + 3] << 0x9) |
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(map[i + 4] << 0xc) |
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(map[i + 5] << 0xf) |
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(map[i + 6] << 0x12) |
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(map[i + 7] << 0x15));
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qdf_mem_copy(&val[cnt], (void *)&value, 3);
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cnt += 3;
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}
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for (i = 0; i < DSCP_TID_TABLE_SIZE; i += 4) {
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regval = *(uint32_t *)(val + i);
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HAL_REG_WRITE(soc, addr,
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(regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
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addr += 4;
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}
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/* Diasble read/write access */
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regval = HAL_REG_READ(soc, cmn_reg_addr);
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regval &=
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~(HWIO_TCL_R0_CONS_RING_CMN_CTRL_REG_DSCP_TID_MAP_PROGRAM_EN_BMSK);
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HAL_REG_WRITE(soc, cmn_reg_addr, regval);
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}
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qdf_export_symbol(hal_tx_set_dscp_tid_map_6290);
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/**
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* hal_tx_update_dscp_tid_6290() - Update the dscp tid map table as updated
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* by the user
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* @soc: HAL SoC context
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* @map: DSCP-TID mapping table
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* @id : MAP ID
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* @dscp: DSCP_TID map index
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*
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* Return: void
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*/
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void hal_tx_update_dscp_tid_6290(void *hal_soc, uint8_t tid,
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uint8_t id, uint8_t dscp)
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{
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int index;
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uint32_t addr;
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uint32_t value;
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uint32_t regval;
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struct hal_soc *soc = (struct hal_soc *)hal_soc;
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addr = HWIO_TCL_R0_DSCP_TID_MAP_n_ADDR(
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SEQ_WCSS_UMAC_MAC_TCL_REG_OFFSET, id);
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index = dscp % HAL_TX_NUM_DSCP_PER_REGISTER;
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addr += 4 * (dscp / HAL_TX_NUM_DSCP_PER_REGISTER);
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value = tid << (HAL_TX_BITS_PER_TID * index);
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regval = HAL_REG_READ(soc, addr);
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regval &= ~(HAL_TX_TID_BITS_MASK << (HAL_TX_BITS_PER_TID * index));
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regval |= value;
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HAL_REG_WRITE(soc, addr, (regval & HWIO_TCL_R0_DSCP_TID_MAP_n_RMSK));
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}
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qdf_export_symbol(hal_tx_update_dscp_tid_6290);
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/**
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* hal_tx_desc_set_lmac_id - Set the lmac_id value
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* @desc: Handle to Tx Descriptor
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* @lmac_id: mac Id to ast matching
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* b00 – mac 0
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* b01 – mac 1
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* b10 – mac 2
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* b11 – all macs (legacy HK way)
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*
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* Return: void
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*/
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void hal_tx_desc_set_lmac_id_6290(void *desc,
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uint8_t lmac_id)
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{
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HAL_SET_FLD(desc, TCL_DATA_CMD_4, LMAC_ID) |=
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HAL_TX_SM(TCL_DATA_CMD_4, LMAC_ID, lmac_id);
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}
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qdf_export_symbol(hal_tx_desc_set_lmac_id_6290);
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