qcacmn: Separate hal for qca6290 and qca8074
Create separate individual hal_srng_table and hal register offset in target specific source files. Create separate functions for qca6290 and qca8074 for few hal rx tx functions as the macro value differs between the chipsets. Assign target specific hal tx, rx ops as part of hal_attach and call respective hal tx, rx ops through callbacks. Change-Id: Ibbf490c678c39fdd9d54191aad7aaec786db30ec
This commit is contained in:

committed by
nshrivas

parent
8ae6415cba
commit
d0159640ea
@@ -33,9 +33,6 @@
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#include "qdf_types.h"
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#include "qdf_util.h"
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#include "hal_internal.h"
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#include "rx_msdu_link.h"
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#include "rx_reo_queue.h"
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#include "rx_reo_queue_ext.h"
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#define MAX_UNWINDOWED_ADDRESS 0x80000
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#ifdef TARGET_TYPE_QCA6390
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@@ -168,6 +165,7 @@ enum hal_ring_type {
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MAX_RING_TYPES
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};
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#define HAL_SRNG_LMAC_RING 0x80000000
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/* SRNG flags passed in hal_srng_params.flags */
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#define HAL_SRNG_MSI_SWAP 0x00000008
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#define HAL_SRNG_RING_PTR_SWAP 0x00000010
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@@ -512,8 +510,8 @@ static inline uint32_t hal_srng_dst_num_valid(void *hal_soc, void *hal_ring,
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int sync_hw_ptr)
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{
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struct hal_srng *srng = (struct hal_srng *)hal_ring;
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uint32 hp;
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uint32 tp = srng->u.dst_ring.tp;
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uint32_t hp;
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uint32_t tp = srng->u.dst_ring.tp;
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if (sync_hw_ptr) {
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hp = *(srng->u.dst_ring.hp_addr);
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@@ -747,8 +745,8 @@ static inline uint32_t hal_srng_src_num_avail(void *hal_soc,
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void *hal_ring, int sync_hw_ptr)
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{
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struct hal_srng *srng = (struct hal_srng *)hal_ring;
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uint32 tp;
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uint32 hp = srng->u.src_ring.hp;
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uint32_t tp;
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uint32_t hp = srng->u.src_ring.hp;
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if (sync_hw_ptr) {
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tp = *(srng->u.src_ring.tp_addr);
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@@ -836,13 +834,11 @@ static inline void hal_srng_access_end_reap(void *hal_soc, void *hal_ring)
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}
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/* TODO: Check if the following definitions is available in HW headers */
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#define WBM_IDLE_DESC_LIST 1
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#define WBM_IDLE_SCATTER_BUF_SIZE 32704
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#define NUM_MPDUS_PER_LINK_DESC 6
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#define NUM_MSDUS_PER_LINK_DESC 7
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#define REO_QUEUE_DESC_ALIGN 128
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#define LINK_DESC_SIZE (NUM_OF_DWORDS_RX_MSDU_LINK << 2)
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#define LINK_DESC_ALIGN 128
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#define ADDRESS_MATCH_TAG_VAL 0x5
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@@ -858,28 +854,6 @@ static inline void hal_srng_access_end_reap(void *hal_soc, void *hal_ring)
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*/
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#define WBM_IDLE_SCATTER_BUF_NEXT_PTR_SIZE 8
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/**
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* hal_set_link_desc_addr - Setup link descriptor in a buffer_addr_info
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* HW structure
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*
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* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
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* @cookie: SW cookie for the buffer/descriptor
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* @link_desc_paddr: Physical address of link descriptor entry
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*
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*/
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static inline void hal_set_link_desc_addr(void *desc, uint32_t cookie,
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qdf_dma_addr_t link_desc_paddr)
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{
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uint32_t *buf_addr = (uint32_t *)desc;
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_0, BUFFER_ADDR_31_0,
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link_desc_paddr & 0xffffffff);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
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(uint64_t)link_desc_paddr >> 32);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
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WBM_IDLE_DESC_LIST);
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HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
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cookie);
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}
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/**
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* hal_idle_list_scatter_buf_size - Get the size of each scatter buffer
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@@ -899,9 +873,19 @@ static inline uint32_t hal_idle_list_scatter_buf_size(void *hal_soc)
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* @hal_soc: Opaque HAL SOC handle
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*
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*/
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static inline uint32_t hal_get_link_desc_size(void *hal_soc)
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static inline uint32_t hal_get_link_desc_size(struct hal_soc *hal_soc)
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{
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return LINK_DESC_SIZE;
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if (!hal_soc || !hal_soc->ops) {
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qdf_print("Error: Invalid ops\n");
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QDF_BUG(0);
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return -EINVAL;
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}
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if (!hal_soc->ops->hal_get_link_desc_size) {
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qdf_print("Error: Invalid function pointer\n");
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QDF_BUG(0);
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return -EINVAL;
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}
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return hal_soc->ops->hal_get_link_desc_size();
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}
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/**
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@@ -1036,30 +1020,6 @@ enum hal_pn_type {
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};
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#define HAL_RX_MAX_BA_WINDOW 256
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/**
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* hal_get_reo_qdesc_size - Get size of reo queue descriptor
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*
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* @hal_soc: Opaque HAL SOC handle
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* @ba_window_size: BlockAck window size
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*
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*/
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static inline uint32_t hal_get_reo_qdesc_size(void *hal_soc,
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uint32_t ba_window_size)
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{
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if (ba_window_size <= 1)
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return sizeof(struct rx_reo_queue);
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if (ba_window_size <= 105)
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return sizeof(struct rx_reo_queue) +
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sizeof(struct rx_reo_queue_ext);
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if (ba_window_size <= 210)
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return sizeof(struct rx_reo_queue) +
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(2 * sizeof(struct rx_reo_queue_ext));
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return sizeof(struct rx_reo_queue) +
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(3 * sizeof(struct rx_reo_queue_ext));
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}
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/**
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* hal_get_reo_qdesc_align - Get start address alignment for reo
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@@ -1151,4 +1111,11 @@ extern void hal_get_srng_params(void *hal_soc, void *hal_ring,
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* @mem: pointer to structure to be updated with hal mem info
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*/
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extern void hal_get_meminfo(void *hal_soc,struct hal_mem_info *mem );
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/**
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* hal_get_target_type - Return target type
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*
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* @hal_soc: Opaque HAL SOC handle
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*/
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uint32_t hal_get_target_type(struct hal_soc *hal);
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#endif /* _HAL_APIH_ */
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