msm: camera: tfe: Updated bus acquire logic for new ports added in Mimas 2.0

Updated wm packer config for new ports i.e. AI and stats.
Added number of write master per composite group in tfe as target
specific data.
Updated correct offsets for bus registers under tfe.

CRs-Fixed: 2982472
Change-Id: If1385ffe869de08ba5cd22de03e3a56fbae064c1
Signed-off-by: Vikram Sharma <[email protected]>

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe530.h

@@ -843,6 +843,7 @@ static struct cam_tfe_bus_hw_info  tfe530_bus_hw_info = {
 		},
 	},
 	.num_comp_grp             = 8,
+	.max_wm_per_comp_grp      = 2,
 	.comp_done_shift          = 8,
 	.top_bus_wr_irq_shift     = 1,
 	.comp_buf_done_mask = 0xFF00,

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe640.h

@@ -1158,6 +1158,7 @@ static struct cam_tfe_bus_hw_info  tfe640_bus_hw_info = {
 		},
 	},
 	.num_comp_grp             = 11,
+	.max_wm_per_comp_grp      = 3,
 	.comp_done_shift          = 8,
 	.top_bus_wr_irq_shift     = 1,
 	.comp_buf_done_mask = 0x7FF00,
@@ -1173,41 +1174,40 @@ static struct cam_tfe_bus_hw_info  tfe640_bus_hw_info = {
 
 struct cam_tfe_hw_info cam_tfe640 = {
 	.top_irq_mask = {
-		0x00001034,
-		0x00001038,
-		0x0000103C,
+		0x00001834,
+		0x00001838,
+		0x0000183C,
 	},
 	.top_irq_clear = {
-		0x00001040,
-		0x00001044,
-		0x00001048,
+		0x00001840,
+		0x00001844,
+		0x00001848,
 	},
 	.top_irq_status = {
-		0x0000104C,
-		0x00001050,
-		0x00001054,
+		0x0000184C,
+		0x00001850,
+		0x00001854,
 	},
-	.top_irq_cmd                       = 0x00001030,
+	.top_irq_cmd                       = 0x00001830,
 	.global_clear_bitmask              = 0x00000001,
-
 	.bus_irq_mask = {
-		0x00001A18,
-		0x00001A1C,
+		0x00003018,
+		0x0000301C,
 	},
 	.bus_irq_clear = {
-		0x00001A20,
-		0x00001A24,
+		0x00003020,
+		0x00003024,
 	},
 	.bus_irq_status = {
-		0x00001A28,
-		0x00001A2C,
+		0x00003028,
+		0x0000302C,
 	},
-	.bus_irq_cmd = 0x00001A30,
-	.bus_violation_reg = 0x00001A64,
-	.bus_overflow_reg = 0x00001A68,
-	.bus_image_size_vilation_reg = 0x1A70,
-	.bus_overflow_clear_cmd = 0x1A60,
-	.debug_status_top = 0x1AD8,
+	.bus_irq_cmd = 0x00003030,
+	.bus_violation_reg = 0x00003064,
+	.bus_overflow_reg = 0x00003068,
+	.bus_image_size_vilation_reg = 0x3070,
+	.bus_overflow_clear_cmd = 0x3060,
+	.debug_status_top = 0x30D8,
 
 	.reset_irq_mask = {
 		0x00000001,

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.c

@@ -22,7 +22,6 @@
 #include "cam_cpas_api.h"
 #include "cam_tfe_csid_hw_intf.h"
 
-
 static const char drv_name[] = "tfe_bus";
 
 #define CAM_TFE_BUS_IRQ_REG0                0
@@ -30,10 +29,8 @@ static const char drv_name[] = "tfe_bus";
 
 #define CAM_TFE_BUS_PAYLOAD_MAX             256
 
-#define CAM_TFE_RDI_BUS_DEFAULT_WIDTH               0xFFFF
-#define CAM_TFE_RDI_BUS_DEFAULT_STRIDE              0xFFFF
-
-#define CAM_TFE_MAX_OUT_RES_PER_COMP_GRP    2
+#define CAM_TFE_RDI_BUS_DEFAULT_WIDTH       0xFFFF
+#define CAM_TFE_RDI_BUS_DEFAULT_STRIDE      0xFFFF
 
 #define MAX_BUF_UPDATE_REG_NUM   \
 	(sizeof(struct cam_tfe_bus_reg_offset_bus_client) / 4)
@@ -119,9 +116,9 @@ struct cam_tfe_bus_comp_grp_data {
 
 	uint32_t                                acquire_dev_cnt;
 	uint32_t                                source_grp;
+	uint32_t                                max_wm_per_comp_grp;
 
-	struct cam_isp_resource_node
-		*out_rsrc[CAM_TFE_MAX_OUT_RES_PER_COMP_GRP];
+	struct cam_isp_resource_node           **out_rsrc;
 };
 
 struct cam_tfe_bus_tfe_out_data {
@@ -156,6 +153,7 @@ struct cam_tfe_bus_priv {
 	uint32_t                            num_client;
 	uint32_t                            num_out;
 	uint32_t                            num_comp_grp;
+	uint32_t                            max_wm_per_comp_grp;
 	uint32_t                            top_bus_wr_irq_shift;
 
 	struct cam_isp_resource_node  bus_client[CAM_TFE_BUS_MAX_CLIENTS];
@@ -340,6 +338,7 @@ static int cam_tfe_bus_get_num_wm(
 	case CAM_TFE_BUS_TFE_OUT_STATS_RS:
 		switch (format) {
 		case CAM_FORMAT_PLAIN32:
+		case CAM_FORMAT_PLAIN32_20:
 			return 1;
 		default:
 			break;
@@ -741,7 +740,7 @@ static int cam_tfe_bus_acquire_wm(
 	/* Set WM offset value to default */
 	rsrc_data->offset  = 0;
 
-	if ((rsrc_data->index > 6) &&
+	if (((rsrc_data->index >= 7) && (rsrc_data->index <= 9)) &&
 		(tfe_out_res_id != CAM_TFE_BUS_TFE_OUT_PDAF)) {
 		/* WM 7-9 refers to RDI 0/ RDI 1/RDI 2 */
 		rc = cam_tfe_bus_acquire_rdi_wm(rsrc_data);
@@ -749,8 +748,9 @@ static int cam_tfe_bus_acquire_wm(
 			return rc;
 
 	} else if (rsrc_data->index == 0 || rsrc_data->index == 1 ||
-		(tfe_out_res_id == CAM_TFE_BUS_TFE_OUT_PDAF)) {
-	/*  WM 0 FULL_OUT WM 1 IDEAL RAW WM9 for pdaf */
+		(tfe_out_res_id == CAM_TFE_BUS_TFE_OUT_PDAF) ||
+		(rsrc_data->index  >= 11 && rsrc_data->index <= 14)) {
+	/*  WM 0 FULL_OUT WM 1 IDEAL RAW, CAM_TFE_BUS_TFE_OUT_PDAF for pdaf */
 		switch (rsrc_data->format) {
 		case CAM_FORMAT_MIPI_RAW_8:
 			rsrc_data->pack_fmt = 0x1;
@@ -772,15 +772,35 @@ static int cam_tfe_bus_acquire_wm(
 			rsrc_data->pack_fmt = 0x6;
 			rsrc_data->pack_fmt |= 0x10;
 			break;
+		case CAM_FORMAT_PD10:
+			rsrc_data->pack_fmt = 0x0;
+			rsrc_data->width /= 4;
+			rsrc_data->height /= 2;
+			break;
+		case CAM_FORMAT_NV21:
+		case CAM_FORMAT_NV12:
+		case CAM_FORMAT_Y_ONLY:
+			rsrc_data->pack_fmt = 0x1;
+			switch (plane) {
+			case PLANE_C:
+				rsrc_data->height /= 2;
+				break;
+			case PLANE_Y:
+				break;
+			default:
+				CAM_ERR(CAM_ISP, "Invalid plane %d", plane);
+				return -EINVAL;
+			}
+			break;
 		default:
 			CAM_ERR(CAM_ISP, "Invalid format %d",
 				rsrc_data->format);
 			return -EINVAL;
 		}
-
 		rsrc_data->en_cfg = 0x1;
-	} else if (rsrc_data->index  >= 2 && rsrc_data->index <= 6) {
-		/* WM 2-6 stats */
+	} else if ((rsrc_data->index  >= 2 && rsrc_data->index <= 6) ||
+		(rsrc_data->index == 15)) {
+		/* WM 2-6 and 15 are stats */
 		rsrc_data->width = 0;
 		rsrc_data->height = 0;
 		rsrc_data->stride = 1;
@@ -950,7 +970,10 @@ static void cam_tfe_bus_add_wm_to_comp_grp(
 {
 	struct cam_tfe_bus_comp_grp_data  *rsrc_data = comp_grp->res_priv;
 
-	rsrc_data->composite_mask |= composite_mask;
+	if (rsrc_data)
+		rsrc_data->composite_mask |= composite_mask;
+	else
+		CAM_ERR(CAM_ISP, "Invalid rsrc data");
 }
 
 static bool cam_tfe_bus_match_comp_grp(
@@ -1005,7 +1028,7 @@ static int cam_tfe_bus_acquire_comp_grp(
 	bool previously_acquired  = false;
 
 	if (comp_grp_id >= CAM_TFE_BUS_COMP_GRP_0 &&
-		comp_grp_id <= CAM_TFE_BUS_COMP_GRP_7) {
+		comp_grp_id < CAM_TFE_BUS_COMP_GRP_MAX) {
 		/* Check if matching comp_grp has already been acquired */
 		previously_acquired = cam_tfe_bus_match_comp_grp(
 			bus_priv, &comp_grp_local, comp_grp_id);
@@ -1017,7 +1040,7 @@ static int cam_tfe_bus_acquire_comp_grp(
 	}
 
 	rsrc_data = comp_grp_local->res_priv;
-	if (rsrc_data->acquire_dev_cnt > CAM_TFE_MAX_OUT_RES_PER_COMP_GRP) {
+	if (rsrc_data->acquire_dev_cnt >= rsrc_data->max_wm_per_comp_grp) {
 		CAM_ERR(CAM_ISP, "Many acquires comp_grp_id:%d", comp_grp_id);
 		return -ENODEV;
 	}
@@ -1045,11 +1068,12 @@ static int cam_tfe_bus_acquire_comp_grp(
 		}
 	}
 
-	CAM_DBG(CAM_ISP, "Acquire comp_grp id:%u", rsrc_data->comp_grp_id);
+	CAM_DBG(CAM_ISP, "rsrc_data %x acquire_dev_cnt %d", rsrc_data, rsrc_data->acquire_dev_cnt);
 	rsrc_data->source_grp = source_group;
 	rsrc_data->out_rsrc[rsrc_data->acquire_dev_cnt] = out_rsrc;
 	rsrc_data->acquire_dev_cnt++;
 	*comp_grp = comp_grp_local;
+	CAM_DBG(CAM_ISP, "Acquire comp_grp id:%u", rsrc_data->comp_grp_id);
 
 	return rc;
 }
@@ -1226,7 +1250,14 @@ static int cam_tfe_bus_init_comp_grp(uint32_t index,
 
 	comp_grp->res_id = index;
 	rsrc_data->comp_grp_id   = index;
-	rsrc_data->common_data     = &bus_priv->common_data;
+	rsrc_data->common_data   = &bus_priv->common_data;
+	rsrc_data->max_wm_per_comp_grp =
+		bus_priv->max_wm_per_comp_grp;
+
+	rsrc_data->out_rsrc = kzalloc(sizeof(struct cam_isp_resource_node *) *
+			rsrc_data->max_wm_per_comp_grp, GFP_KERNEL);
+	if (!rsrc_data->out_rsrc)
+		return -ENOMEM;
 
 	list_add_tail(&comp_grp->list, &bus_priv->free_comp_grp);
 
@@ -1256,6 +1287,7 @@ static int cam_tfe_bus_deinit_comp_grp(
 		CAM_ERR(CAM_ISP, "comp_grp_priv is NULL");
 		return -ENODEV;
 	}
+	kfree(rsrc_data->out_rsrc);
 	kfree(rsrc_data);
 
 	return 0;
@@ -1370,8 +1402,7 @@ static int cam_tfe_bus_acquire_tfe_out(void *priv, void *acquire_args,
 			&rsrc_data->wm_res[i],
 			acq_args->tasklet,
 			tfe_out_res_id,
-			i,
-			&client_done_mask,
+			i, &client_done_mask,
 			out_acquire_args->is_dual,
 			&comp_grp_id);
 		if (rc) {
@@ -2492,6 +2523,7 @@ int cam_tfe_bus_init(
 	bus_priv->num_client                   = hw_info->num_client;
 	bus_priv->num_out                      = hw_info->num_out;
 	bus_priv->num_comp_grp                 = hw_info->num_comp_grp;
+	bus_priv->max_wm_per_comp_grp          = hw_info->max_wm_per_comp_grp;
 	bus_priv->top_bus_wr_irq_shift         = hw_info->top_bus_wr_irq_shift;
 	bus_priv->common_data.comp_done_shift  = hw_info->comp_done_shift;
 

drivers/cam_isp/isp_hw_mgr/isp_hw/tfe_hw/cam_tfe_bus.h

@@ -186,6 +186,7 @@ struct cam_tfe_bus_tfe_out_hw_info {
  * @bus_client_reg:        Bus client register info
  * @tfe_out_hw_info:       TFE output capability
  * @num_comp_grp:          Number of composite group
+ * @max_wm_per_comp_grp:   Max number of wm associated with one composite group
  * @comp_done_shift:       Mask shift for comp done mask
  * @top_bus_wr_irq_shift:  Mask shift for top level BUS WR irq
  * @comp_buf_done_mask:    Composite buf done bits mask
@@ -204,6 +205,7 @@ struct cam_tfe_bus_hw_info {
 	struct cam_tfe_bus_tfe_out_hw_info
 		tfe_out_hw_info[CAM_TFE_BUS_TFE_OUT_MAX];
 	uint32_t num_comp_grp;
+	uint32_t max_wm_per_comp_grp;
 	uint32_t comp_done_shift;
 	uint32_t top_bus_wr_irq_shift;
 	uint32_t comp_buf_done_mask;