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disp: msm: sde: add support for AVR_STEP feature

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Add AVR step support so SW can trigger a late frame and instead
of immediately triggering, HW will perform the update at the
start of the next step interval. This allows for a fixed SW
vsync timeline to be maintained in userland, eliminating the
usual drift from the actual HW vsync caused by a late frame.

This change adds AVR_STEP support via a DRM property.

Change-Id: I4cf8a296989805f134c2165a3bed0b050bb09c96
Signed-off-by: Steve Cohen <cohens@codeaurora.org>
This commit is contained in:
Steve Cohen
2021-01-19 19:27:57 -05:00
parent ccf41a547c
commit cf86c94f8e
9 changed files with 146 additions and 83 deletions
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7
msm/sde/sde_hw_intf.c
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@@ -175,9 +175,10 @@ static void sde_hw_intf_avr_ctrl(struct sde_hw_intf *ctx,
c = &ctx->hw;
if (avr_params->avr_mode) {
avr_ctrl = BIT(0);
avr_mode =
(avr_params->avr_mode == SDE_RM_QSYNC_ONE_SHOT_MODE) ?
(BIT(0) | BIT(8)) : 0x0;
avr_mode = (avr_params->avr_mode == SDE_RM_QSYNC_ONE_SHOT_MODE) ?
(BIT(0) | BIT(8)) : 0x0;
if (avr_params->avr_step_lines)
avr_mode |= avr_params->avr_step_lines << 16;
}
SDE_REG_WRITE(c, INTF_AVR_CONTROL, avr_ctrl);