samsung-sm8650/android_kernel_samsung_sm8650-modules
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Merge branch 'display-kernel.lnx.5.10' into display-kernel.lnx.1.0

ソースを参照 
Change-Id: I5d2b08380b6b0eb09492b950fb38cd9a0b3196c1
このコミットが含まれているのは:
Jeykumar Sankaran
2021-12-08 12:37:35 -08:00
親 fe83c42f56 2a867bb340
コミット cf39b00660
53個のファイルの変更、1867行の追加、334行の削除
Patchファイルをダウンロード Diffファイルをダウンロード すべてのファイルを展開 すべてのファイルを折り畳む

99
msm/sde/sde_crtc.c
ファイルの表示

@@ -1,4 +1,5 @@
/*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2014-2021 The Linux Foundation. All rights reserved.
* Copyright (C) 2013 Red Hat
* Author: Rob Clark <robdclark@gmail.com>
@@ -73,6 +74,9 @@ static int sde_crtc_pm_event_handler(struct drm_crtc *crtc, bool en,
static int _sde_crtc_set_noise_layer(struct sde_crtc *sde_crtc,
struct sde_crtc_state *cstate,
void __user *usr_ptr);
static int sde_crtc_vm_release_handler(struct drm_crtc *crtc_drm,
bool en, struct sde_irq_callback *irq);
static struct sde_crtc_custom_events custom_events[] = {
{DRM_EVENT_AD_BACKLIGHT, sde_cp_ad_interrupt},
@@ -84,6 +88,7 @@ static struct sde_crtc_custom_events custom_events[] = {
{DRM_EVENT_LTM_WB_PB, sde_cp_ltm_wb_pb_interrupt},
{DRM_EVENT_LTM_OFF, sde_cp_ltm_off_event_handler},
{DRM_EVENT_MMRM_CB, sde_crtc_mmrm_interrupt_handler},
{DRM_EVENT_VM_RELEASE, sde_crtc_vm_release_handler},
};
/* default input fence timeout, in ms */
@@ -3713,8 +3718,13 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,
_sde_crtc_dest_scaler_setup(crtc);
sde_cp_crtc_apply_noise(crtc, old_state);
if (crtc->state->mode_changed)
if (crtc->state->mode_changed || sde_kms->perf.catalog->uidle_cfg.dirty) {
sde_core_perf_crtc_update_uidle(crtc, true);
} else if (!test_bit(SDE_CRTC_DIRTY_UIDLE, &sde_crtc->revalidate_mask) &&
sde_kms->perf.uidle_enabled)
sde_core_perf_uidle_setup_ctl(crtc, false);
test_and_clear_bit(SDE_CRTC_DIRTY_UIDLE, &sde_crtc->revalidate_mask);
/*
* Since CP properties use AXI buffer to program the
@@ -3734,7 +3744,7 @@ static void sde_crtc_atomic_begin(struct drm_crtc *crtc,
sde_cp_crtc_apply_properties(crtc);
if (!sde_crtc->enabled)
sde_cp_crtc_suspend(crtc);
sde_cp_crtc_mark_features_dirty(crtc);
/*
* PP_DONE irq is only used by command mode for now.
@@ -3794,7 +3804,7 @@ static void sde_crtc_atomic_flush(struct drm_crtc *crtc,
dev = crtc->dev;
priv = dev->dev_private;
if ((sde_crtc->cache_state == CACHE_STATE_PRE_CACHE) &&
if ((sde_crtc->cache_state == CACHE_STATE_NORMAL) &&
sde_crtc_get_property(cstate, CRTC_PROP_CACHE_STATE))
sde_crtc_static_img_control(crtc, CACHE_STATE_FRAME_WRITE,
false);
@@ -3963,37 +3973,6 @@ static void _sde_crtc_remove_pipe_flush(struct drm_crtc *crtc)
}
}
static void _sde_crtc_schedule_idle_notify(struct drm_crtc *crtc)
{
struct sde_crtc *sde_crtc = to_sde_crtc(crtc);
struct sde_crtc_state *cstate = to_sde_crtc_state(crtc->state);
struct sde_kms *sde_kms = _sde_crtc_get_kms(crtc);
struct msm_drm_private *priv;
struct msm_drm_thread *event_thread;
int idle_time = 0;
if (!sde_kms || !sde_kms->dev || !sde_kms->dev->dev_private)
return;
priv = sde_kms->dev->dev_private;
idle_time = sde_crtc_get_property(cstate, CRTC_PROP_IDLE_TIMEOUT);
if (!idle_time ||
!sde_encoder_check_curr_mode(sde_crtc->mixers[0].encoder,
MSM_DISPLAY_VIDEO_MODE) ||
(crtc->index >= ARRAY_SIZE(priv->event_thread)) ||
(sde_crtc->cache_state > CACHE_STATE_NORMAL))
return;
/* schedule the idle notify delayed work */
event_thread = &priv->event_thread[crtc->index];
kthread_mod_delayed_work(&event_thread->worker,
&sde_crtc->idle_notify_work, msecs_to_jiffies(idle_time));
SDE_DEBUG("schedule idle notify work in %dms\n", idle_time);
}
/**
* sde_crtc_reset_hw - attempt hardware reset on errors
* @crtc: Pointer to DRM crtc instance
@@ -4218,8 +4197,6 @@ void sde_crtc_commit_kickoff(struct drm_crtc *crtc,
spin_unlock_irqrestore(&dev->event_lock, flags);
}
_sde_crtc_schedule_idle_notify(crtc);
SDE_ATRACE_END("crtc_commit");
}
@@ -4434,6 +4411,7 @@ void sde_crtc_reset_sw_state(struct drm_crtc *crtc)
/* mark other properties which need to be dirty for next update */
set_bit(SDE_CRTC_DIRTY_DIM_LAYERS, &sde_crtc->revalidate_mask);
set_bit(SDE_CRTC_DIRTY_UIDLE, &sde_crtc->revalidate_mask);
if (cstate->num_ds_enabled)
set_bit(SDE_CRTC_DIRTY_DEST_SCALER, cstate->dirty);
}
@@ -4637,7 +4615,6 @@ static void sde_crtc_disable(struct drm_crtc *crtc)
mutex_lock(&sde_crtc->crtc_lock);
kthread_cancel_delayed_work_sync(&sde_crtc->static_cache_read_work);
kthread_cancel_delayed_work_sync(&sde_crtc->idle_notify_work);
SDE_EVT32(DRMID(crtc), sde_crtc->enabled, crtc->state->active,
crtc->state->enable, sde_crtc->cached_encoder_mask);
@@ -5974,10 +5951,6 @@ static void sde_crtc_install_properties(struct drm_crtc *crtc,
sde_crtc_install_perf_properties(sde_crtc, sde_kms, catalog, info);
msm_property_install_range(&sde_crtc->property_info,
"idle_time", 0, 0, U64_MAX, 0,
CRTC_PROP_IDLE_TIMEOUT);
if (test_bit(SDE_FEATURE_TRUSTED_VM, catalog->features)) {
int init_idx = sde_in_trusted_vm(sde_kms) ? 1 : 0;
@@ -7167,12 +7140,8 @@ void sde_crtc_static_img_control(struct drm_crtc *crtc,
kthread_cancel_delayed_work_sync(
&sde_crtc->static_cache_read_work);
break;
case CACHE_STATE_PRE_CACHE:
if (sde_crtc->cache_state != CACHE_STATE_NORMAL)
return;
break;
case CACHE_STATE_FRAME_WRITE:
if (sde_crtc->cache_state != CACHE_STATE_PRE_CACHE)
if (sde_crtc->cache_state != CACHE_STATE_NORMAL)
return;
break;
case CACHE_STATE_FRAME_READ:
@@ -7268,33 +7237,10 @@ void sde_crtc_static_cache_read_kickoff(struct drm_crtc *crtc)
msecs_to_jiffies(msecs_fps));
}
/*
* __sde_crtc_idle_notify_work - signal idle timeout to user space
*/
static void __sde_crtc_idle_notify_work(struct kthread_work *work)
{
struct sde_crtc *sde_crtc = container_of(work, struct sde_crtc,
idle_notify_work.work);
struct drm_crtc *crtc;
int ret = 0;
if (!sde_crtc) {
SDE_ERROR("invalid sde crtc\n");
} else {
crtc = &sde_crtc->base;
sde_crtc_event_notify(crtc, DRM_EVENT_IDLE_NOTIFY, sizeof(u32), ret);
SDE_DEBUG("crtc[%d]: idle timeout notified\n", crtc->base.id);
sde_crtc_static_img_control(crtc, CACHE_STATE_PRE_CACHE, false);
}
}
void sde_crtc_cancel_delayed_work(struct drm_crtc *crtc)
{
struct sde_crtc *sde_crtc;
struct sde_crtc_state *cstate;
bool idle_status;
bool cache_status;
if (!crtc || !crtc->state)
@@ -7303,9 +7249,8 @@ void sde_crtc_cancel_delayed_work(struct drm_crtc *crtc)
sde_crtc = to_sde_crtc(crtc);
cstate = to_sde_crtc_state(crtc->state);
idle_status = kthread_cancel_delayed_work_sync(&sde_crtc->idle_notify_work);
cache_status = kthread_cancel_delayed_work_sync(&sde_crtc->static_cache_read_work);
SDE_EVT32(DRMID(crtc), idle_status, cache_status);
SDE_EVT32(DRMID(crtc), cache_status);
}
/* initialize crtc */
@@ -7401,8 +7346,6 @@ struct drm_crtc *sde_crtc_init(struct drm_device *dev, struct drm_plane *plane)
sde_crtc->new_perf.llcc_active[i] = false;
}
kthread_init_delayed_work(&sde_crtc->idle_notify_work,
__sde_crtc_idle_notify_work);
kthread_init_delayed_work(&sde_crtc->static_cache_read_work,
__sde_crtc_static_cache_read_work);
@@ -7636,6 +7579,11 @@ static int sde_crtc_mmrm_interrupt_handler(struct drm_crtc *crtc_drm,
return 0;
}
static int sde_crtc_vm_release_handler(struct drm_crtc *crtc_drm,
bool en, struct sde_irq_callback *irq)
{
return 0;
}
/**
* sde_crtc_update_cont_splash_settings - update mixer settings
* and initial clk during device bootup for cont_splash use case
@@ -7792,3 +7740,8 @@ void sde_crtc_disable_cp_features(struct drm_crtc *crtc)
{
sde_cp_disable_features(crtc);
}
void _sde_crtc_vm_release_notify(struct drm_crtc *crtc)
{
sde_crtc_event_notify(crtc, DRM_EVENT_VM_RELEASE, sizeof(uint32_t), 1);
}