disp: msm: sde: always set CTL_x_UIDLE_ACTIVE register to "1"

As per HW recommendation, FAL10_VETO_OVERRIDE register can
be programmed to disable FAL10 in alternate to disabling
uidle at the sspp level as disabling UIDLE controller will
only disable DPU traffic shaping and will not stop the
system from entering FAL10 state. This change programs
FAL10_VETO_OVERRIDE register during uidle disable and also
sets CTL_x_UIDLE_ACTIVE register to always one to avoid
race condition between different CTL paths.

Change-Id: I9c55f5da2037cb8c448cc978eac0a04608a93650
Signed-off-by: Yashwanth <quic_yvulapu@quicinc.com>
这个提交包含在:
Yashwanth
2022-01-03 15:37:12 +05:30
父节点 17970cc74c
当前提交 cf0f2627c4
修改 3 个文件,包含 9 行新增11 行删除

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@@ -1,5 +1,5 @@
/*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2015-2021 The Linux Foundation. All rights reserved.
* Copyright (C) 2013 Red Hat
* Author: Rob Clark <robdclark@gmail.com>
@@ -443,7 +443,6 @@ enum sde_crtc_dirty_flags {
SDE_CRTC_DIRTY_DEST_SCALER,
SDE_CRTC_DIRTY_DIM_LAYERS,
SDE_CRTC_NOISE_LAYER,
SDE_CRTC_DIRTY_UIDLE,
SDE_CRTC_DIRTY_MAX,
};