From cf0c63d564ab0ec5dddb27fab9d7f29c70b7ba06 Mon Sep 17 00:00:00 2001 From: Laxminath Kasam Date: Mon, 1 Oct 2018 15:35:35 +0530 Subject: [PATCH] asoc: wcd937x: update access for wcd937x registers Remove page registers from access table. Update read/write access for registers as per HW spec. Change-Id: I8c32b79e4f0d4e378df5c83f3934c68f6c72385f Signed-off-by: Laxminath Kasam --- asoc/codecs/wcd937x/wcd937x-tables.c | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) diff --git a/asoc/codecs/wcd937x/wcd937x-tables.c b/asoc/codecs/wcd937x/wcd937x-tables.c index 70507306a5..5baf773351 100644 --- a/asoc/codecs/wcd937x/wcd937x-tables.c +++ b/asoc/codecs/wcd937x/wcd937x-tables.c @@ -178,7 +178,6 @@ const u8 wcd937x_reg_access[WCD937X_REG(WCD937X_REGISTERS_MAX_SIZE)] = { [WCD937X_REG(WCD937X_EAR_TEST_CTL)] = RD_WR_REG, [WCD937X_REG(WCD937X_EAR_STATUS_REG_1)] = RD_REG, [WCD937X_REG(WCD937X_EAR_STATUS_REG_2)] = RD_REG, - [WCD937X_REG(WCD937X_ANA_NEW_PAGE_REGISTER)] = RD_WR_REG, [WCD937X_REG(WCD937X_HPH_NEW_ANA_HPH2)] = RD_WR_REG, [WCD937X_REG(WCD937X_HPH_NEW_ANA_HPH3)] = RD_WR_REG, [WCD937X_REG(WCD937X_SLEEP_CTL)] = RD_WR_REG, @@ -195,8 +194,8 @@ const u8 wcd937x_reg_access[WCD937X_REG(WCD937X_REGISTERS_MAX_SIZE)] = { [WCD937X_REG(WCD937X_AUX_AUXPA)] = RD_WR_REG, [WCD937X_REG(WCD937X_LDORXTX_MODE)] = RD_WR_REG, [WCD937X_REG(WCD937X_LDORXTX_CONFIG)] = RD_WR_REG, - [WCD937X_REG(WCD937X_DIE_CRACK_DIE_CRK_DET_EN)] = RD_REG, - [WCD937X_REG(WCD937X_DIE_CRACK_DIE_CRK_DET_OUT)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIE_CRACK_DIE_CRK_DET_EN)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIE_CRACK_DIE_CRK_DET_OUT)] = RD_REG, [WCD937X_REG(WCD937X_HPH_NEW_INT_RDAC_GAIN_CTL)] = RD_WR_REG, [WCD937X_REG(WCD937X_HPH_NEW_INT_RDAC_HD2_CTL_L)] = RD_WR_REG, [WCD937X_REG(WCD937X_HPH_NEW_INT_RDAC_VREF_CTL)] = RD_WR_REG, @@ -241,7 +240,6 @@ const u8 wcd937x_reg_access[WCD937X_REG(WCD937X_REGISTERS_MAX_SIZE)] = { [WCD937X_REG(WCD937X_SLEEP_INT_WATCHDOG_CTL_2)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIE_CRACK_INT_DIE_CRK_DET_INT1)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIE_CRACK_INT_DIE_CRK_DET_INT2)] = RD_WR_REG, - [WCD937X_REG(WCD937X_DIGITAL_PAGE_REGISTER)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CHIP_ID0)] = RD_REG, [WCD937X_REG(WCD937X_DIGITAL_CHIP_ID1)] = RD_REG, [WCD937X_REG(WCD937X_DIGITAL_CHIP_ID2)] = RD_REG, @@ -282,9 +280,9 @@ const u8 wcd937x_reg_access[WCD937X_REG(WCD937X_REGISTERS_MAX_SIZE)] = { [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R2)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R3)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R4)] = RD_WR_REG, - [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R4)] = RD_WR_REG, - [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R4)] = RD_WR_REG, - [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R4)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R5)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R6)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIGITAL_CDC_HPH_DSM_R7)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CDC_AUX_DSM_A1_0)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CDC_AUX_DSM_A1_1)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_CDC_AUX_DSM_A2_0)] = RD_WR_REG, @@ -375,6 +373,7 @@ const u8 wcd937x_reg_access[WCD937X_REG(WCD937X_REGISTERS_MAX_SIZE)] = { [WCD937X_REG(WCD937X_DIGITAL_PAD_CTL_PDM_RX2)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_PAD_CTL_PDM_TX)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_PAD_CTL_PDM_TX)] = RD_WR_REG, + [WCD937X_REG(WCD937X_DIGITAL_PAD_INP_DIS_0)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_PAD_INP_DIS_1)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_DRIVE_STRENGTH_0)] = RD_WR_REG, [WCD937X_REG(WCD937X_DIGITAL_DRIVE_STRENGTH_1)] = RD_WR_REG,