qcacmn: Add support for additional REO rings for Beryllium

Beryllium supports additional REO rings to cater increased bandwidth.
Enable additional REO rings.

Change-Id: I5124c92e30e4ac56a78b6f5f38d1c91a2933bba8
CRs-Fixed: 2930184

dp/inc/cdp_txrx_stats_struct.h

@@ -72,7 +72,11 @@
 #define WME_AC_VO    3    /* voice */
 #define WME_AC_MAX   4    /* MAX AC Value */
 
+#ifdef CONFIG_BERYLLIUM
+#define CDP_MAX_RX_RINGS 8  /* max rx rings */
+#else
 #define CDP_MAX_RX_RINGS 4  /* max rx rings */
+#endif
 #define CDP_MAX_TX_COMP_RINGS 3  /* max tx completion rings */
 #define CDP_MAX_TX_TQM_STATUS 9  /* max tx tqm completion status */
 #define CDP_MAX_TX_HTT_STATUS 7  /* max tx htt completion status */

dp/wifi3.0/dp_main.c

@@ -3300,6 +3300,8 @@ void dp_link_desc_ring_replenish(struct dp_soc *soc, uint32_t mac_id)
 }
 
 #ifdef IPA_OFFLOAD
+#define USE_1_IPA_RX_REO_RING 1
+#define USE_2_IPA_RX_REO_RINGS 2
 #define REO_DST_RING_SIZE_QCA6290 1023
 #ifndef CONFIG_WIFI_EMULATION_WIFI_3_0
 #define REO_DST_RING_SIZE_QCA8074 1023
@@ -3706,10 +3708,27 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
  */
 bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
 {
-	uint32_t ring[4] = {REO_REMAP_SW1, REO_REMAP_SW2,
-						REO_REMAP_SW3};
-	hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
-				      3, remap1, remap2);
+	uint32_t ring[8] = {REO_REMAP_SW1, REO_REMAP_SW2, REO_REMAP_SW3};
+	int target_type;
+
+	target_type = hal_get_target_type(soc->hal_soc);
+
+	switch (target_type) {
+	case TARGET_TYPE_WCN7850:
+		hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
+					      soc->num_reo_dest_rings -
+					      USE_2_IPA_RX_REO_RINGS, remap1,
+					      remap2);
+		break;
+
+	default:
+		hal_compute_reo_remap_ix2_ix3(soc->hal_soc, ring,
+					      soc->num_reo_dest_rings -
+					      USE_1_IPA_RX_REO_RING, remap1,
+					      remap2);
+		break;
+	}
+
 	dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
 
 	return true;
@@ -3897,6 +3916,7 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
 	case dp_nss_cfg_dbtc:
 		/* return false if both or all are offloaded to NSS */
 		return false;
+
 	}
 
 	dp_debug("remap1 %x remap2 %x offload_radio %u",

dp/wifi3.0/dp_stats.c

@@ -6502,6 +6502,37 @@ dp_print_soc_tx_stats(struct dp_soc *soc)
 		       soc->stats.tx.hp_oos2);
 }
 
+#ifdef CONFIG_BERYLLIUM
+void dp_print_soc_interrupt_stats(struct dp_soc *soc)
+{
+	int i = 0;
+	struct dp_intr_stats *intr_stats;
+
+	DP_PRINT_STATS("INT:     Total  |txComps|reo[0] |reo[1] |reo[2] |reo[3] |reo[4] |reo[5] |reo[6] |reo[7] |mon    |rx_err | wbm   |reo_sta|rxdm2hst|hst2rxdm|");
+	for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
+		intr_stats = &soc->intr_ctx[i].intr_stats;
+		DP_PRINT_STATS("%3u[%3d]: %7u %7u %7u %7u %7u %7u %7u %7u %7u %7u %7u %7u %7u %7u %8u %8u",
+			       i,
+			       hif_get_int_ctx_irq_num(soc->hif_handle, i),
+			       intr_stats->num_masks,
+			       intr_stats->num_tx_ring_masks[0],
+			       intr_stats->num_rx_ring_masks[0],
+			       intr_stats->num_rx_ring_masks[1],
+			       intr_stats->num_rx_ring_masks[2],
+			       intr_stats->num_rx_ring_masks[3],
+			       intr_stats->num_rx_ring_masks[4],
+			       intr_stats->num_rx_ring_masks[5],
+			       intr_stats->num_rx_ring_masks[6],
+			       intr_stats->num_rx_ring_masks[7],
+			       intr_stats->num_rx_mon_ring_masks,
+			       intr_stats->num_rx_err_ring_masks,
+			       intr_stats->num_rx_wbm_rel_ring_masks,
+			       intr_stats->num_reo_status_ring_masks,
+			       intr_stats->num_rxdma2host_ring_masks,
+			       intr_stats->num_host2rxdma_ring_masks);
+		}
+}
+#else
 void dp_print_soc_interrupt_stats(struct dp_soc *soc)
 {
 	int i = 0;
@@ -6527,6 +6558,7 @@ void dp_print_soc_interrupt_stats(struct dp_soc *soc)
 			       intr_stats->num_host2rxdma_ring_masks);
 		}
 }
+#endif
 
 void
 dp_print_soc_rx_stats(struct dp_soc *soc)

dp/wifi3.0/dp_types.h

@@ -97,7 +97,11 @@
 
 #define MAX_TXDESC_POOLS 4
 #define MAX_RXDESC_POOLS 4
+#ifdef CONFIG_BERYLLIUM
+#define MAX_REO_DEST_RINGS 8
+#else
 #define MAX_REO_DEST_RINGS 4
+#endif
 #define EXCEPTION_DEST_RING_ID 0
 #define MAX_TCL_DATA_RINGS 4
 #define MAX_IDLE_SCATTER_BUFS 16

hal/wifi3.0/hal_api.h

@@ -1055,7 +1055,16 @@ extern void *hal_srng_setup(void *hal_soc, int ring_type, int ring_num,
 #define REO_REMAP_SW4 4
 #define REO_REMAP_RELEASE 5
 #define REO_REMAP_FW 6
-#define REO_REMAP_UNUSED 7
+/*
+ * In Beryllium: 4 bits REO destination ring value is defined as: 0: TCL
+ * 1:SW1  2:SW2  3:SW3  4:SW4  5:Release  6:FW(WIFI)  7:SW5
+ * 8:SW6 9:SW7  10:SW8  11: NOT_USED.
+ *
+ */
+#define REO_REMAP_SW5 7
+#define REO_REMAP_SW6 8
+#define REO_REMAP_SW7 9
+#define REO_REMAP_SW8 10
 
 /*
  * Macro to access HWIO_REO_R0_ERROR_DESTINATION_RING_CTRL_IX_0

hal/wifi3.0/wcn7850/hal_7850.c

@@ -1114,47 +1114,98 @@ hal_rx_flow_setup_fse_7850(uint8_t *rx_fst, uint32_t table_offset,
 }
 
 static
-void hal_compute_reo_remap_ix2_ix3_7850(uint32_t *ring, uint32_t num_rings,
-					uint32_t *remap1, uint32_t *remap2)
+void hal_compute_reo_remap_ix2_ix3_7850(uint32_t *ring_map,
+					uint32_t num_rings, uint32_t *remap1,
+					uint32_t *remap2)
 {
+	/*
+	 * The 4 bits REO destination ring value is defined as: 0: TCL
+	 * 1:SW1  2:SW2  3:SW3  4:SW4  5:Release  6:FW(WIFI)  7:SW5
+	 * 8:SW6 9:SW7  10:SW8  11: NOT_USED.
+	 *
+	 */
+	uint32_t reo_dest_ring_map[] = {REO_REMAP_SW1, REO_REMAP_SW2,
+					REO_REMAP_SW3, REO_REMAP_SW4,
+					REO_REMAP_SW5, REO_REMAP_SW6,
+					REO_REMAP_SW7, REO_REMAP_SW8};
+
 	switch (num_rings) {
+	default:
 	case 3:
-		*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
-				HAL_REO_REMAP_IX2(ring[1], 17) |
-				HAL_REO_REMAP_IX2(ring[2], 18) |
-				HAL_REO_REMAP_IX2(ring[0], 19) |
-				HAL_REO_REMAP_IX2(ring[1], 20) |
-				HAL_REO_REMAP_IX2(ring[2], 21) |
-				HAL_REO_REMAP_IX2(ring[0], 22) |
-				HAL_REO_REMAP_IX2(ring[1], 23);
-
-		*remap2 = HAL_REO_REMAP_IX3(ring[2], 24) |
-				HAL_REO_REMAP_IX3(ring[0], 25) |
-				HAL_REO_REMAP_IX3(ring[1], 26) |
-				HAL_REO_REMAP_IX3(ring[2], 27) |
-				HAL_REO_REMAP_IX3(ring[0], 28) |
-				HAL_REO_REMAP_IX3(ring[1], 29) |
-				HAL_REO_REMAP_IX3(ring[2], 30) |
-				HAL_REO_REMAP_IX3(ring[0], 31);
+		*remap1 = HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 16) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 17) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 18) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 19) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 20) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 21) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 22) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 23);
+
+		*remap2 = HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 24) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 25) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 26) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 27) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 28) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 29) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 30) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 31);
 		break;
 	case 4:
-		*remap1 = HAL_REO_REMAP_IX2(ring[0], 16) |
-				HAL_REO_REMAP_IX2(ring[1], 17) |
-				HAL_REO_REMAP_IX2(ring[2], 18) |
-				HAL_REO_REMAP_IX2(ring[3], 19) |
-				HAL_REO_REMAP_IX2(ring[0], 20) |
-				HAL_REO_REMAP_IX2(ring[1], 21) |
-				HAL_REO_REMAP_IX2(ring[2], 22) |
-				HAL_REO_REMAP_IX2(ring[3], 23);
-
-		*remap2 = HAL_REO_REMAP_IX3(ring[0], 24) |
-				HAL_REO_REMAP_IX3(ring[1], 25) |
-				HAL_REO_REMAP_IX3(ring[2], 26) |
-				HAL_REO_REMAP_IX3(ring[3], 27) |
-				HAL_REO_REMAP_IX3(ring[0], 28) |
-				HAL_REO_REMAP_IX3(ring[1], 29) |
-				HAL_REO_REMAP_IX3(ring[2], 30) |
-				HAL_REO_REMAP_IX3(ring[3], 31);
+		*remap1 = HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 16) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 17) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 18) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[3], 19) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 20) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 21) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 22) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[3], 23);
+
+		*remap2 = HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 24) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 25) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 26) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[3], 27) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 28) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 29) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 30) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[3], 31);
+		break;
+	case 6:
+		*remap1 = HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 16) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 17) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 18) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[4], 19) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[5], 20) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[6], 21) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 22) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 23);
+
+		*remap2 = HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 24) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[4], 25) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[5], 26) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[6], 27) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 28) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 29) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 30) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[4], 31);
+		break;
+	case 8:
+		*remap1 = HAL_REO_REMAP_IX2(reo_dest_ring_map[0], 16) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[1], 17) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[2], 18) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[3], 19) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[4], 20) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[5], 21) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[6], 22) |
+			  HAL_REO_REMAP_IX2(reo_dest_ring_map[7], 23);
+
+		*remap2 = HAL_REO_REMAP_IX3(reo_dest_ring_map[0], 24) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[1], 25) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[2], 26) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[3], 27) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[4], 28) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[5], 29) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[6], 30) |
+			  HAL_REO_REMAP_IX3(reo_dest_ring_map[7], 31);
 		break;
 	}
 }
@@ -1394,7 +1445,7 @@ struct hal_hw_srng_config hw_srng_table_7850[] = {
 	/* TODO: max_rings can populated by querying HW capabilities */
 	{ /* REO_DST */
 		.start_ring_id = HAL_SRNG_REO2SW1,
-		.max_rings = 4,
+		.max_rings = 8,
 		.entry_size = sizeof(struct reo_destination_ring) >> 2,
 		.lmac_ring = FALSE,
 		.ring_dir = HAL_SRNG_DST_RING,

hif/inc/hif.h

@@ -131,10 +131,15 @@ struct CE_state;
 #else
 #define CE_COUNT_MAX 12
 #endif
-#define HIF_MAX_GRP_IRQ 16
 
 #ifndef HIF_MAX_GROUP
+#ifdef CONFIG_BERYLLIUM
+#define HIF_MAX_GROUP 11
+#define HIF_MAX_GRP_IRQ 20
+#else
 #define HIF_MAX_GROUP 7
+#define HIF_MAX_GRP_IRQ 16
+#endif
 #endif
 
 #ifndef NAPI_YIELD_BUDGET_BASED

hif/src/pcie/if_pci.c

@@ -87,6 +87,12 @@ const char *dp_irqname[WLAN_CFG_MAX_PCIE_GROUPS][WLAN_CFG_INT_NUM_CONTEXTS] = {
 "pci0_wlan_grp_dp_4",
 "pci0_wlan_grp_dp_5",
 "pci0_wlan_grp_dp_6",
+#ifdef CONFIG_BERYLLIUM
+"pci0_wlan_grp_dp_7",
+"pci0_wlan_grp_dp_8",
+"pci0_wlan_grp_dp_9",
+"pci0_wlan_grp_dp_10",
+#endif
 #if !defined(WLAN_MAX_PDEVS)
 "pci0_wlan_grp_dp_7",
 "pci0_wlan_grp_dp_8",
@@ -3163,6 +3169,7 @@ int hif_pci_configure_grp_irq(struct hif_softc *scn,
 		if (scn->irq_unlazy_disable)
 			qdf_dev_set_irq_status_flags(irq,
 						     QDF_IRQ_DISABLE_UNLAZY);
+
 		hif_debug("request_irq = %d for grp %d",
 			  irq, hif_ext_group->grp_id);
 		ret = pfrm_request_irq(

wlan_cfg/cfg_dp.h

@@ -227,7 +227,11 @@
 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MIN 3
 #define WLAN_CFG_NUM_TCL_DATA_RINGS_MAX 5
 
+#if defined(CONFIG_BERYLLIUM)
+#define WLAN_CFG_NUM_REO_DEST_RING 8
+#else
 #define WLAN_CFG_NUM_REO_DEST_RING 4
+#endif
 #define WLAN_CFG_NUM_REO_DEST_RING_MIN 4
 #define WLAN_CFG_NUM_REO_DEST_RING_MAX 8
 

wlan_cfg/wlan_cfg.c

@@ -52,6 +52,11 @@
 #define WLAN_CFG_RX_RING_MASK_1 0x2
 #define WLAN_CFG_RX_RING_MASK_2 0x4
 #define WLAN_CFG_RX_RING_MASK_3 0x8
+#define WLAN_CFG_RX_RING_MASK_4 0x10
+#define WLAN_CFG_RX_RING_MASK_5 0x20
+#define WLAN_CFG_RX_RING_MASK_6 0x40
+#define WLAN_CFG_RX_RING_MASK_7 0x80
+
 
 #define WLAN_CFG_RX_MON_RING_MASK_0 0x1
 #define WLAN_CFG_RX_MON_RING_MASK_1 0x2
@@ -117,20 +122,45 @@ static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIO
 		{ WLAN_CFG_TX_RING_MASK_0,
 		  0, 0, 0, 0, 0, 0},
 		/* rx ring masks */
-#ifndef IPA_OFFLOAD
+#ifdef CONFIG_BERYLLIUM
+#ifdef IPA_OFFLOAD
+		{ 0,
+		  WLAN_CFG_RX_RING_MASK_0,
+		  WLAN_CFG_RX_RING_MASK_1,
+		  WLAN_CFG_RX_RING_MASK_2, 0, 0, 0,
+		  WLAN_CFG_RX_RING_MASK_4,
+		  WLAN_CFG_RX_RING_MASK_5,
+		  WLAN_CFG_RX_RING_MASK_6,
+		  0},
+#else /* IPA_OFFLOAD */
 		{ 0,
 		  WLAN_CFG_RX_RING_MASK_0,
 		  WLAN_CFG_RX_RING_MASK_1,
 		  WLAN_CFG_RX_RING_MASK_2,
 		  WLAN_CFG_RX_RING_MASK_3,
-		  0, 0},
-#else
+		  0, 0,
+		  WLAN_CFG_RX_RING_MASK_4,
+		  WLAN_CFG_RX_RING_MASK_5,
+		  WLAN_CFG_RX_RING_MASK_6,
+		  0},
+#endif /* IPA_OFFLOAD */
+#else /* CONFIG_BERYLLIUM */
+#ifdef IPA_OFFLOAD
 		{ 0,
 		  WLAN_CFG_RX_RING_MASK_0,
 		  WLAN_CFG_RX_RING_MASK_1,
 		  WLAN_CFG_RX_RING_MASK_2,
 		  0, 0, 0},
-#endif
+#else /* IPA_OFFLOAD */
+		{ 0,
+		  WLAN_CFG_RX_RING_MASK_0,
+		  WLAN_CFG_RX_RING_MASK_1,
+		  WLAN_CFG_RX_RING_MASK_2,
+		  WLAN_CFG_RX_RING_MASK_3,
+		  0, 0},
+#endif /* IPA_OFFLOAD */
+#endif /* CONFIG_BERYLLIUM */
+
 		/* rx mon ring masks */
 		{ 0,
 		  WLAN_CFG_RX_MON_RING_MASK_0,

wlan_cfg/wlan_cfg.h

@@ -26,7 +26,11 @@
 #if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
 #define WLAN_CFG_DST_RING_CACHED_DESC 0
 #define MAX_PDEV_CNT 1
+#ifdef CONFIG_BERYLLIUM
+#define WLAN_CFG_INT_NUM_CONTEXTS 11
+#else
 #define WLAN_CFG_INT_NUM_CONTEXTS 7
+#endif
 #define WLAN_CFG_RXDMA1_ENABLE 1
 /*
  * This mask defines how many transmit frames account for 1 NAPI work unit
@@ -59,7 +63,11 @@
 
 /* Rx configuration */
 #define MAX_RXDESC_POOLS 4
+#ifdef CONFIG_BERYLLIUM
+#define MAX_REO_DEST_RINGS 8
+#else
 #define MAX_REO_DEST_RINGS 4
+#endif
 #define MAX_RX_MAC_RINGS 2
 
 /* DP process status */