asoc: wcd939x: use half rate selection for HPH DAC

Harmonium supports full and half rate modes for DAC.
Update DAC rate to swr clkdiv2 to achieve better
power performance.

Change-Id: I136a064dc258ee839ea78c9f1051ba34521ac871
Signed-off-by: Phani Kumar Uppalapati <quic_phaniu@quicinc.com>
This commit is contained in:
Phani Kumar Uppalapati
2023-03-08 00:00:08 -08:00
父節點 575a0b0dd1
當前提交 ce393052e3

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@@ -1032,9 +1032,14 @@ static int wcd939x_rx_mux(struct snd_soc_dapm_widget *w,
case SND_SOC_DAPM_POST_PMU:
wcd939x_config_xtalk(component, event, w->shift);
/*TBD: need to revisit , for both L & R we are updating, but in QCRG only once*/
if (wcd939x->hph_pcm_enabled)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x1));
if (wcd939x->hph_pcm_enabled) {
if (hph_mode == CLS_H_HIFI || hph_mode == CLS_AB_HIFI)
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x1));
else
snd_soc_component_update_bits(component,
REG_FIELD_VALUE(TOP_CFG0, HPH_DAC_RATE_SEL, 0x0));
}
wcd939x_enable_hph_pcm_index(component, event, w->shift);
break;
case SND_SOC_DAPM_POST_PMD: