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@@ -306,7 +306,7 @@ static struct msm_platform_core_capability core_data_pineapple[] = {
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{MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */
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{MAX_MBPS_ALL_INTRA, 2088960}, /* 4096x2176/256 MBs@60fps */
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{MAX_ENH_LAYER_COUNT, 5},
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{MAX_ENH_LAYER_COUNT, 5},
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{NUM_VPP_PIPE, 4},
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{NUM_VPP_PIPE, 4},
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- {SW_PC, 0},
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+ {SW_PC, 1},
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{FW_UNLOAD, 0},
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{FW_UNLOAD, 0},
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{HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */
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{HW_RESPONSE_TIMEOUT, HW_RESPONSE_TIMEOUT_VALUE}, /* 1000 ms */
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{SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/
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{SW_PC_DELAY, SW_PC_DELAY_VALUE }, /* 1500 ms (>HW_RESPONSE_TIMEOUT)*/
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@@ -2630,8 +2630,8 @@ static const struct clk_table pineapple_clk_table[] = {
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/* name */
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/* name */
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static const struct clk_rst_table pineapple_clk_reset_table[] = {
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static const struct clk_rst_table pineapple_clk_reset_table[] = {
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{ "video_axi_reset" },
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{ "video_axi_reset" },
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+ { "video_xo_reset" },
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{ "video_mvs0c_reset" },
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{ "video_mvs0c_reset" },
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- /*{ "video_xo_reset" }, TODO: add after clock driver support */
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};
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};
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/* name, llcc_id */
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/* name, llcc_id */
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qctecmdr