qcacmn: Add frequency range check in reg_get_band_cap_from_op_class
When the operating class 82 is given as an input to the function reg_get_band_cap_from_op_class, it is not found due to an incorrect conditional logic that checks the starting frequency of a band. To address this problem, add a function reg_get_band_cap_from_chan_set and call it within the function reg_get_band_cap_from_op_class, to check if a channel in the channel set, is within the frequency range of the band. Change-Id: I7cbd8decf3c19f80e60a3153529b622b144feac9 CRs-Fixed: 2636367
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committed by
nshrivas

parent
a700ecf10e
commit
cc9fb0cd68
@@ -369,6 +369,25 @@ uint8_t reg_dmn_get_opclass_from_freq_width(uint8_t *country,
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return 0;
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}
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static void
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reg_get_band_cap_from_chan_set(const struct reg_dmn_op_class_map_t
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*op_class_tbl,
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uint8_t *supported_band)
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{
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qdf_freq_t chan_freq = op_class_tbl->start_freq +
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(op_class_tbl->channels[0] *
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FREQ_TO_CHAN_SCALE);
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if (reg_is_24ghz_ch_freq(chan_freq))
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*supported_band |= BIT(REG_BAND_2G);
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else if (reg_is_5ghz_ch_freq(chan_freq))
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*supported_band |= BIT(REG_BAND_5G);
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else if (reg_is_6ghz_chan_freq(chan_freq))
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*supported_band |= BIT(REG_BAND_6G);
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else
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reg_err_rl("Unknown band");
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}
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uint8_t reg_get_band_cap_from_op_class(const uint8_t *country,
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uint8_t num_of_opclass,
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const uint8_t *opclass)
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@@ -382,18 +401,8 @@ uint8_t reg_get_band_cap_from_op_class(const uint8_t *country,
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for (opclassidx = 0; opclassidx < num_of_opclass;
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opclassidx++) {
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if (op_class_tbl->op_class == opclass[opclassidx]) {
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if (op_class_tbl->start_freq ==
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TWOG_START_FREQ) {
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supported_band |= BIT(REG_BAND_2G);
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} else if (op_class_tbl->start_freq ==
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FIVEG_START_FREQ) {
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supported_band |= BIT(REG_BAND_5G);
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} else if (op_class_tbl->start_freq ==
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SIXG_STARTING_FREQ) {
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supported_band |= BIT(REG_BAND_6G);
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} else {
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reg_err_rl("Unknown band");
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}
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reg_get_band_cap_from_chan_set(op_class_tbl,
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&supported_band);
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}
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}
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op_class_tbl++;
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@@ -41,8 +41,6 @@
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#define CH_AVOID_MAX_RANGE 4
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#define REG_ALPHA2_LEN 2
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#define MAX_REG_RULES 10
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#define TWOG_START_FREQ 2407
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#define FIVEG_START_FREQ 5000
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#define REGULATORY_CHAN_DISABLED BIT(0)
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#define REGULATORY_CHAN_NO_IR BIT(1)
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