fw-api: CL 25920610 - update fw common interface files
HTT: add H2T TX_SUPER_RULE_SETUP msg def Change-Id: If338c1a95723cce04d9607918c0162cdc261e7f5 CRs-Fixed: 2262693
This commit is contained in:
spuligil
441
fw/htt.h
441
fw/htt.h
@@ -1,6 +1,6 @@
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/*
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* Copyright (c) 2011-2021 The Linux Foundation. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*
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* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
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*
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@@ -254,11 +254,13 @@
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* 3.126 Add HTT_RXDATA_ERR_INVALID_PEER def.
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* 3.127 Add transmit_count fields in htt_tx_wbm_completion_vX structs.
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* 3.128 Add H2T TX_LATENCY_STATS_CFG + T2H TX_LATENCY_STATS_PERIODIC_IND
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* msg defs
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* msg defs.
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* 3.129 Add HTT_TX_FW2WBM_REINJECT_REASON_SAWF_SVC_CLASS_ID_ABSENT def.
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* 3.130 Add H2T TX_LCE_SUPER_RULE_SETUP and T2H TX_LCE_SUPER_RULE_SETUP_DONE
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* msg defs.
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*/
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#define HTT_CURRENT_VERSION_MAJOR 3
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#define HTT_CURRENT_VERSION_MINOR 129
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#define HTT_CURRENT_VERSION_MINOR 130
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#define HTT_NUM_TX_FRAG_DESC 1024
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@@ -894,6 +896,7 @@ enum htt_h2t_msg_type {
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HTT_H2T_MSG_TYPE_RX_CCE_SUPER_RULE_SETUP = 0x23,
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HTT_H2T_MSG_TYPE_PRIMARY_LINK_PEER_MIGRATE_RESP = 0x24,
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HTT_H2T_MSG_TYPE_TX_LATENCY_STATS_CFG = 0x25,
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HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP = 0x26,
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/* keep this last */
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HTT_H2T_NUM_MSGS
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@@ -1924,6 +1927,14 @@ typedef enum {
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#define HTT_TX_MSDU_EXT2_DESC_BW_160MHZ_M 0x00000020
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#define HTT_TX_MSDU_EXT2_DESC_BW_160MHZ_S 5
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/* Rx buffer addr qdata ctrl pkt */
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struct htt_h2t_rx_buffer_addr_info {
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A_UINT32 buffer_addr_31_0 : 32; // [31:0]
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A_UINT32 buffer_addr_39_32 : 8, // [7:0]
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return_buffer_manager : 4, // [11:8]
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sw_buffer_cookie : 20; // [31:12]
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};
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/**
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* @brief HTT tx MSDU extension descriptor v2
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* @details
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@@ -2063,8 +2074,11 @@ PREPACK struct htt_tx_msdu_desc_ext2_t {
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A_UINT32 host_opaque_cookie : 16, /* see is_host_opaque_valid */
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rsvd1 : 16;
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/* DWORD 7-8 : Rx buffer addr for qdata frames */
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struct htt_h2t_rx_buffer_addr_info rx_buffer_addr;
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/*
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* This structure can be expanded further up to 40 bytes
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* This structure can be expanded further up to 32 bytes
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* by adding further DWORDs as needed.
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*/
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} POSTPACK;
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@@ -2443,6 +2457,51 @@ PREPACK struct htt_tx_msdu_desc_ext2_t {
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((_var) |= ((_val) << HTT_TX_MSDU_EXT2_DESC_HOST_OPAQUE_COOKIE_S)); \
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} while (0)
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/* DWORD 7 */
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_M 0xFFFFFFFF
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_S 0
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0, value); \
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(word) |= (value) << HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_S; \
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} while (0)
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_GET(word) \
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(((word) & HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_M) >> HTT_RX_BUFFER_ADDR_INFO_ADDR_31_0_S)
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/* DWORD 8 */
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_M 0x000000FF
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_S 0
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32, value); \
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(word) |= (value) << HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_S; \
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} while (0)
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#define HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_GET(word) \
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(((word) & HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_M) >> HTT_RX_BUFFER_ADDR_INFO_ADDR_39_32_S)
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#define HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_M 0x00000F00
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#define HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_S 8
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#define HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER, value); \
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(word) |= (value) << HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_S; \
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} while (0)
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#define HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_GET(word) \
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(((word) & HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_M) >> HTT_RX_BUFFER_ADDR_INFO_RETURN_BUFFER_MANAGER_S)
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#define HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_M 0xFFFFF000
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#define HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_S 12
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#define HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_SET(word, value) \
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do { \
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HTT_CHECK_SET_VAL(HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE, value); \
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(word) |= (value) << HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_S; \
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} while (0)
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#define HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_GET(word) \
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(((word) & HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_M) >> HTT_RX_BUFFER_ADDR_INFO_SW_BUFFER_COOKIE_S)
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typedef enum {
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HTT_TCL_METADATA_TYPE_PEER_BASED = 0,
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@@ -2473,7 +2532,8 @@ typedef struct {
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vdev_id: 8,
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pdev_id: 2,
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host_inspected:1,
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rsvd: 19;
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opt_dp_ctrl: 1, /* 1 -> qdata consent pkt */
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rsvd: 18;
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} htt_tx_tcl_vdev_metadata;
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typedef struct {
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@@ -2505,6 +2565,8 @@ PREPACK struct htt_tx_tcl_metadata {
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#define HTT_TX_TCL_METADATA_PDEV_ID_S 10
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#define HTT_TX_TCL_METADATA_HOST_INSPECTED_M 0x00001000
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#define HTT_TX_TCL_METADATA_HOST_INSPECTED_S 12
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#define HTT_TX_TCL_METADATA_OPT_DP_CTRL_M 0x00002000
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#define HTT_TX_TCL_METADATA_OPT_DP_CTRL_S 13
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/* PEER metadata */
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#define HTT_TX_TCL_METADATA_PEER_ID_M 0x0000fffc
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@@ -2564,6 +2626,15 @@ PREPACK struct htt_tx_tcl_metadata {
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((_var) |= ((_val) << HTT_TX_TCL_METADATA_PEER_ID_S)); \
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} while (0)
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#define HTT_TX_TCL_METADATA_OPT_DP_CTRL_GET(_var) \
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(((_var) & HTT_TX_TCL_METADATA_OPT_DP_CTRL_M) >> \
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HTT_TX_TCL_METADATA_OPT_DP_CTRL_S)
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#define HTT_TX_TCL_METADATA_OPT_DP_CTRL_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_TCL_METADATA_OPT_DP_CTRL, _val); \
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((_var) |= ((_val) << HTT_TX_TCL_METADATA_OPT_DP_CTRL_S)); \
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} while (0)
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/*------------------------------------------------------------------
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* V2 Version of TCL Data Command
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* V2 Version to support peer_id, vdev_id, svc_class_id and
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@@ -2776,6 +2847,7 @@ typedef enum {
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HTT_TX_FW2WBM_REINJECT_REASON_FLOW_CONTROL,
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HTT_TX_FW2WBM_REINJECT_REASON_MLO_MCAST,
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HTT_TX_FW2WBM_REINJECT_REASON_SAWF_SVC_CLASS_ID_ABSENT,
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HTT_TX_FW2WBM_REINJECT_REASON_OPT_DP_CTRL, /* tx qdata packet */
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HTT_TX_FW2WBM_REINJECT_REASON_MAX,
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} htt_tx_fw2wbm_reinject_reason_t;
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@@ -10683,6 +10755,207 @@ PREPACK struct htt_rx_cce_super_rule_setup_t {
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} while (0)
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/*
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* @brief host -> target HTT TX_LCE_SUPER_RULE_SETUP message
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*
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* MSG_TYPE => HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP
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*
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* @details
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* Host sends TX_SUPER_RULE setup message to target, in order to request,
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* install, or uninstall tx super rules to match certain kind of packets
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* with specific parameters. Target sets up HW registers based on setup
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* message and always confirms back to host (by sending a T2H
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* TX_LCE_SUPER_RULE_SETUP_DONE message).
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*
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* The message would appear as follows:
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* |31 24|23 16|15 8|7 0|
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* |-----------------+-----------------+-----------------+-----------------|
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* | reserved | operation | pdev_id | msg_type |
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* |-----------------------------------------------------------------------|
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* | tx_super_rule_param[0] |
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* |-----------------------------------------------------------------------|
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* | tx_super_rule_param[1] |
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* |-----------------------------------------------------------------------|
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* | tx_super_rule_param[2] |
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* |-----------------------------------------------------------------------|
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*
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* The message is interpreted as follows:
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* dword0 - b'0:7 - msg_type: This will be set to
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* 0x26 (HTT_H2T_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP)
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* b'8:15 - pdev_id: Identify which pdev TX_SUPER_RULE is for
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* b'16:23 - operation: Identify operation to be taken,
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* 0: HTT_TX_LCE_SUPER_RULE_INSTALL
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* 1: HTT_TX_LCE_SUPER_RULE_RELEASE
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* b'24:31 - reserved
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* dword1~10 - tx_super_rule_param[0]:
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* contains parameters used to setup TX_SUPER_RULE_0
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* dword11~20 - tx_super_rule_param[1]:
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* contains parameters used to setup TX_SUPER_RULE_1
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* dword21~30 - tx_super_rule_param[2]:
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* contains parameters used to setup TX_SUPER_RULE_2
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*
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* Each tx_super_rule_param structure would appear as follows:
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* |31 24|23 16|15 8|7 0|
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* |-----------------+-----------------+-----------------+-----------------|
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* |src_ipv6_addr[3] |src_ipv6_addr[2] |src_ipv6_addr[1] |src_ipv6_addr[0] |
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* |/src_ipv4_addr[3]|/src_ipv4_addr[2]|/src_ipv4_addr[1]|/src_ipv4_addr[0]|
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* |-----------------------------------------------------------------------|
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* |src_ipv6_addr[7] |src_ipv6_addr[6] |src_ipv6_addr[5] |src_ipv6_addr[4] |
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* |-----------------------------------------------------------------------|
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* |src_ipv6_addr[11]|src_ipv6_addr[10]|src_ipv6_addr[9] |src_ipv6_addr[8] |
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* |-----------------------------------------------------------------------|
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* |src_ipv6_addr[15]|src_ipv6_addr[14]|src_ipv6_addr[13]|src_ipv6_addr[12]|
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* |-----------------------------------------------------------------------|
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* |dst_ipv6_addr[3] |dst_ipv6_addr[2] |dst_ipv6_addr[1] |dst_ipv6_addr[0] |
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* |/dst_ipv4_addr[3]|/dst_ipv4_addr[2]|/dst_ipv4_addr[1]|/dst_ipv4_addr[0]|
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* |-----------------------------------------------------------------------|
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* |dst_ipv6_addr[7] |dst_ipv6_addr[6] |dst_ipv6_addr[5] |dst_ipv6_addr[4] |
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* |-----------------------------------------------------------------------|
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* |dst_ipv6_addr[11]|dst_ipv6_addr[10]|dst_ipv6_addr[9] |dst_ipv6_addr[8] |
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* |-----------------------------------------------------------------------|
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* |dst_ipv6_addr[15]|dst_ipv6_addr[14]|dst_ipv6_addr[13]|dst_ipv6_addr[12]|
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* |-----------------------------------------------------------------------|
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* | is_valid | l4_type | l3_type |
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* |-----------------------------------------------------------------------|
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* | l4_dst_port | l4_src_port |
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* |-----------------------------------------------------------------------|
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* Where l3_type is 802.3 EtherType, l4_type is IANA IP protocol type.
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*
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* The tx_super_rule_param[1] structure is similar.
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* The tx_super_rule_param[2] structure is similar.
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*/
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#define HTT_TX_LCE_SUPER_RULE_SETUP_NUM 3
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enum htt_tx_lce_super_rule_setup_operation {
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HTT_TX_LCE_SUPER_RULE_INSTALL = 0,
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HTT_TX_LCE_SUPER_RULE_RELEASE,
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/* All operation should be before this */
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HTT_TX_LCE_SUPER_RULE_SETUP_INVALID_OPERATION,
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};
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typedef struct {
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union {
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A_UINT8 src_ipv4_addr[4];
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A_UINT8 src_ipv6_addr[16];
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};
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union {
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A_UINT8 dst_ipv4_addr[4];
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A_UINT8 dst_ipv6_addr[16];
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};
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A_UINT32 l3_type: 16,
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l4_type: 8,
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is_valid: 8;
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A_UINT32 l4_src_port: 16,
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l4_dst_port: 16;
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} htt_tx_lce_super_rule_param_t;
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PREPACK struct htt_tx_lce_super_rule_setup_t {
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A_UINT32 msg_type: 8,
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pdev_id: 8,
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operation: 8, /* htt_tx_lce_super_rule_setup_operation */
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reserved: 8;
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htt_tx_lce_super_rule_param_t
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lce_super_rule_param[HTT_TX_LCE_SUPER_RULE_SETUP_NUM];
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} POSTPACK;
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#define HTT_TX_LCE_SUPER_RULE_SETUP_SZ (sizeof(struct htt_tx_lce_super_rule_setup_t))
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#define HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_M 0x0000ff00
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#define HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_S 8
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#define HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_GET(_var) \
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(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_M) >> \
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HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_S)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID, _val); \
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((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_PDEV_ID_S)); \
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} while (0)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_M 0x00ff0000
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#define HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_S 16
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#define HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_GET(_var) \
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(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_M) >> \
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HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_S)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION, _val); \
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((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_OPERATION_S)); \
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} while (0)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_M 0x0000ffff
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_S 0
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_GET(_var) \
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(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_M) >> \
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HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_S)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE, _val); \
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((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_L3_TYPE_S)); \
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} while (0)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_M 0x00ff0000
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_S 16
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_GET(_var) \
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(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_M) >> \
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HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_S)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE, _val); \
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((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_L4_TYPE_S)); \
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} while (0)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_M 0xff000000
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#define HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_S 24
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#define HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_GET(_var) \
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(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_M) >> \
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HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_S)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_SET(_var, _val) \
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do { \
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HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID, _val); \
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((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_IS_VALID_S)); \
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} while (0)
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_M 0x0000ffff
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#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_S 0
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_L4_SRC_PORT_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_M 0xffff0000
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_S 16
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_L4_DST_PORT_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_IPV4_ADDR_ARRAY_GET(_ptr, _array) \
|
||||
do { \
|
||||
A_MEMCPY(_array, _ptr, 4); \
|
||||
} while (0)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_IPV4_ADDR_ARRAY_SET(_ptr, _array) \
|
||||
do { \
|
||||
A_MEMCPY(_ptr, _array, 4); \
|
||||
} while (0)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_IPV6_ADDR_ARRAY_GET(_ptr, _array) \
|
||||
do { \
|
||||
A_MEMCPY(_array, _ptr, 16); \
|
||||
} while (0)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_IPV6_ADDR_ARRAY_SET(_ptr, _array) \
|
||||
do { \
|
||||
A_MEMCPY(_ptr, _array, 16); \
|
||||
} while (0)
|
||||
|
||||
|
||||
/**
|
||||
* htt_h2t_primary_link_peer_status_type -
|
||||
* Unique number for each status or reasons
|
||||
@@ -10998,6 +11271,7 @@ enum htt_t2h_msg_type {
|
||||
HTT_T2H_MSG_TYPE_PEER_AST_OVERRIDE_INDEX_IND = 0x38,
|
||||
HTT_T2H_MSG_TYPE_PEER_EXTENDED_EVENT = 0x39,
|
||||
HTT_T2H_MSG_TYPE_TX_LATENCY_STATS_PERIODIC_IND = 0x3a,
|
||||
HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE = 0x3b,
|
||||
|
||||
|
||||
HTT_T2H_MSG_TYPE_TEST,
|
||||
@@ -21424,6 +21698,163 @@ PREPACK struct htt_rx_cce_super_rule_setup_done_t {
|
||||
((_var) |= ((_val) << HTT_RX_CCE_SUPER_RULE_SETUP_DONE_CFG_RESULT_1_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
/**
|
||||
* @brief target -> host TX_LCE_SUPER_RULE setup done message
|
||||
*
|
||||
* MSG_TYPE => HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE
|
||||
*
|
||||
* @details
|
||||
* HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE message is sent by the target
|
||||
* when TX_SUPER_RULE setup is done.
|
||||
*
|
||||
* This message shows the configuration results after the setup operation.
|
||||
* It will always be sent to host.
|
||||
* The message would appear as follows:
|
||||
*
|
||||
* |31 24|23 16|15 8|7 0|
|
||||
* |-----------------+-----------------+----------------+----------------|
|
||||
* | reserved | response_type | pdev_id | msg_type |
|
||||
* |---------------------------------------------------------------------|
|
||||
* | tx_super_rule_result[0] |
|
||||
* |---------------------------------------------------------------------|
|
||||
* | tx_super_rule_result[1] |
|
||||
* |---------------------------------------------------------------------|
|
||||
* | tx_super_rule_result[2] |
|
||||
* |---------------------------------------------------------------------|
|
||||
*
|
||||
* The message is interpreted as follows:
|
||||
* dword0 - b'0:7 - msg_type: This will be set to 0x3b
|
||||
* (HTT_T2H_MSG_TYPE_TX_LCE_SUPER_RULE_SETUP_DONE)
|
||||
* b'8:15 - pdev_id: Identify which pdev TX_SUPER_RULE is setup on
|
||||
* b'16:23 - response_type: Indicate the response type of this setup
|
||||
* done msg
|
||||
* 0: HTT_TX_LCE_SUPER_RULE_INSTALL_RESPONSE,
|
||||
* response to HTT_TX_LCE_SUPER_RULE_INSTALL
|
||||
* 1: HTT_TX_LCE_SUPER_RULE_RELEASE_RESPONSE,
|
||||
* response to HTT_TX_LCE_SUPER_RULE_RELEASE or
|
||||
* FW internal trigger on LCE rule release
|
||||
* b'24:31 - reserved:
|
||||
*
|
||||
* Each tx_super_rule_result structure would appear as follows:
|
||||
* |31 24|23 16|15 8|7 0|
|
||||
* |---------------------------------------------------------------------|
|
||||
* | is_valid | result | l4_dst_port |
|
||||
* |---------------------------------------------------------------------|
|
||||
*
|
||||
* dword0 - b'0:15 - l4_dst_port: destination port corresponding to rule
|
||||
* which is added/released
|
||||
* b'16:23 - result: Indicate the result of the operation based on
|
||||
* the message header's "response_type"
|
||||
* For HTT_TX_LCE_SUPER_RULE_INSTALL_RESPONSE:
|
||||
* 0: HTT_TX_LCE_SUPER_RULE_INSTALL_FAIL
|
||||
* 1: HTT_TX_LCE_SUPER_RULE_INSTALL_SUCCESS
|
||||
* For HTT_TX_LCE_SUPER_RULE_RELEASE_RESPONSE:
|
||||
* 0: HTT_TX_LCE_SUPER_RULE_RELEASE_FAIL
|
||||
* 1: HTT_TX_LCE_SUPER_RULE_RELEASE_SUCCESS
|
||||
* 2: HTT_TX_LCE_SUPER_RULE_RELEASE_SUCCESS_HIGH_TPUT
|
||||
*
|
||||
* The tx_super_rule_result[1] structure is similar.
|
||||
* The tx_super_rule_result[2] structure is similar.
|
||||
*/
|
||||
|
||||
enum htt_tx_lce_super_rule_setup_done_response_type {
|
||||
/* Two LCE rules operation responses */
|
||||
HTT_TX_LCE_SUPER_RULE_INSTALL_RESPONSE = 0,
|
||||
HTT_TX_LCE_SUPER_RULE_RELEASE_RESPONSE,
|
||||
|
||||
/* All reply type should be before this */
|
||||
HTT_TX_LCE_RULE_SETUP_INVALID_RESPONSE,
|
||||
};
|
||||
|
||||
enum htt_tx_super_rule_install_response_result {
|
||||
HTT_TX_LCE_SUPER_RULE_INSTALL_FAIL = 0,
|
||||
HTT_TX_LCE_SUPER_RULE_INSTALL_SUCCESS,
|
||||
};
|
||||
|
||||
enum htt_tx_super_rule_release_response_result{
|
||||
HTT_TX_LCE_SUPER_RULE_RELEASE_FAIL = 0,
|
||||
HTT_TX_LCE_SUPER_RULE_RELEASE_SUCCESS,
|
||||
HTT_TX_LCE_SUPER_RULE_RELEASE_SUCCESS_HIGH_TPUT,
|
||||
};
|
||||
|
||||
typedef struct {
|
||||
A_UINT32 l4_dst_port: 16,
|
||||
/* result:
|
||||
* htt_tx_super_rule_install_response_result or
|
||||
* htt_tx_super_rule_release_response_result
|
||||
*/
|
||||
result: 8,
|
||||
is_valid: 8;
|
||||
} htt_tx_lce_super_rule_result_t;
|
||||
|
||||
PREPACK struct htt_tx_lce_super_rule_setup_done_t {
|
||||
A_UINT8 msg_type;
|
||||
A_UINT8 pdev_id;
|
||||
A_UINT8 response_type; /* htt_tx_lce_super_rule_setup_done_response_type */
|
||||
A_UINT8 reserved;
|
||||
htt_tx_lce_super_rule_result_t tx_super_rule_result[HTT_TX_LCE_SUPER_RULE_SETUP_NUM];
|
||||
} POSTPACK;
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_SZ (sizeof(struct htt_tx_lce_super_rule_setup_done_t))
|
||||
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_M 0x0000ff00
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_S 8
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_DONE_PDEV_ID_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_M 0x00ff0000
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_S 16
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESPONSE_TYPE_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_M 0x0000ffff
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_S 0
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_DONE_L4_DST_PORT_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_M 0x00ff0000
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_S 16
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_DONE_RESULT_S)); \
|
||||
} while (0)
|
||||
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_M 0xff000000
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_S 24
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_GET(_var) \
|
||||
(((_var) & HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_M) >> \
|
||||
HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_S)
|
||||
#define HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_SET(_var, _val) \
|
||||
do { \
|
||||
HTT_CHECK_SET_VAL(HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID, _val); \
|
||||
((_var) |= ((_val) << HTT_TX_LCE_SUPER_RULE_SETUP_DONE_IS_VALID_S)); \
|
||||
} while (0)
|
||||
|
||||
|
||||
/**
|
||||
* THE BELOW MESSAGE HAS BEEN DEPRECATED
|
||||
*======================================
|
||||
|
||||
Reference in New Issue
Block a user