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@@ -75,10 +75,6 @@ static bool is_ssr_disabled;
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#define CMAC_SIZE_IN_BYTES (128/8) /* 128 bit = 16 bytes */
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#define CMAC_SIZE_IN_DWORDS (CMAC_SIZE_IN_BYTES/sizeof(u32)) /* 4 dwords */
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-// MCP code size register holds size divided by a factor
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-// To get the actual size, need to multiply by the same factor
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-#define MCP_SIZE_MUL_FACTOR (4)
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-
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static u32 pil_addr;
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static u32 pil_size;
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@@ -730,34 +726,6 @@ static void spss_utils_destroy_chardev(void)
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/* Device Tree */
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/*==========================================================================*/
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-/* get the ACTUAL spss PIL firmware size from spu reg */
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-static int get_pil_size(phys_addr_t base_addr)
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-{
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- u32 spss_code_size_addr = 0;
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- void __iomem *spss_code_size_reg = NULL;
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- u32 pil_size = 0;
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-
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- spss_code_size_addr = base_addr + SPSS_RMB_CODE_SIZE_REG_OFFSET;
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- spss_code_size_reg = ioremap(spss_code_size_addr, sizeof(u32));
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- if (!spss_code_size_reg) {
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- pr_err("can't map spss_code_size_addr\n");
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- return -EINVAL;
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- }
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- pil_size = readl_relaxed(spss_code_size_reg);
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- iounmap(spss_code_size_reg);
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-
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- // Multiply the value read from code size register by factor
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- // to get the actual size (see MCP_SIZE_MUL_FACTOR documentation)
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- pil_size *= MCP_SIZE_MUL_FACTOR;
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-
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- if (pil_size % SZ_4K) {
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- pr_err("pil_size [0x%08x] is not 4K aligned.\n", pil_size);
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- return -EFAULT;
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- }
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-
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- return pil_size;
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-}
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-
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/**
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* spss_parse_dt() - Parse Device Tree info.
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*/
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@@ -951,7 +919,7 @@ static int spss_parse_dt(struct device_node *node)
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spss_regs_base_addr =
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(spss_debug_reg_addr & SPSS_BASE_ADDR_MASK);
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- ret = get_pil_size(spss_regs_base_addr);
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+ ret = get_spss_image_size(spss_regs_base_addr);
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if (ret < 0) {
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pr_err("failed to get pil_size.\n");
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return -EFAULT;
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