qcacmn: Add hal_rx_msdu_end_first_msdu_get API
Implement hal_rx_msdu_end_first_msdu_get API based on the chipset as the macro to retrieve first_msdu value is chipset dependent. Change-Id: Iea325159a0349c45a249c1ae113664c41a54b0f1 CRs-Fixed: 2522133
This commit is contained in:

committed by
nshrivas

parent
a2d7497e1c
commit
cb255b4834
@@ -697,7 +697,8 @@ dp_rx_null_q_desc_handle(struct dp_soc *soc, qdf_nbuf_t nbuf,
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qdf_ether_header_t *eh;
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qdf_ether_header_t *eh;
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qdf_nbuf_set_rx_chfrag_start(nbuf,
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qdf_nbuf_set_rx_chfrag_start(nbuf,
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hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr));
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hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
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rx_tlv_hdr));
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qdf_nbuf_set_rx_chfrag_end(nbuf,
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qdf_nbuf_set_rx_chfrag_end(nbuf,
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hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr));
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hal_rx_msdu_end_last_msdu_get(rx_tlv_hdr));
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qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
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qdf_nbuf_set_da_mcbc(nbuf, hal_rx_msdu_end_da_is_mcbc_get(soc->hal_soc,
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@@ -1049,7 +1050,8 @@ void dp_rx_process_mic_error(struct dp_soc *soc, qdf_nbuf_t nbuf,
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QDF_STATUS status;
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QDF_STATUS status;
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struct cdp_rx_mic_err_info mic_failure_info;
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struct cdp_rx_mic_err_info mic_failure_info;
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if (!hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr))
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if (!hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
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rx_tlv_hdr))
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return;
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return;
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if (!peer) {
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if (!peer) {
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@@ -1500,7 +1502,8 @@ done:
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case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
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case HAL_REO_ERR_REGULAR_FRAME_2K_JUMP:
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pool_id = wbm_err_info.pool_id;
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pool_id = wbm_err_info.pool_id;
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if (hal_rx_msdu_end_first_msdu_get(rx_tlv_hdr)) {
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if (hal_rx_msdu_end_first_msdu_get(soc->hal_soc,
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rx_tlv_hdr)) {
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peer_id =
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peer_id =
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hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
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hal_rx_mpdu_start_sw_peer_id_get(rx_tlv_hdr);
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tid =
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tid =
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@@ -388,6 +388,7 @@ struct hal_hw_txrx_ops {
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uint32_t (*hal_rx_msdu_end_l3_hdr_padding_get)(uint8_t *buf);
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uint32_t (*hal_rx_msdu_end_l3_hdr_padding_get)(uint8_t *buf);
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uint32_t (*hal_rx_encryption_info_valid)(uint8_t *buf);
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uint32_t (*hal_rx_encryption_info_valid)(uint8_t *buf);
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void (*hal_rx_print_pn)(uint8_t *buf);
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void (*hal_rx_print_pn)(uint8_t *buf);
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uint8_t (*hal_rx_msdu_end_first_msdu_get)(uint8_t *buf);
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};
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};
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/**
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/**
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@@ -1802,29 +1802,21 @@ hal_rx_msdu_end_da_is_mcbc_get(hal_soc_handle_t hal_soc_hdl, uint8_t *buf)
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return hal_soc->ops->hal_rx_msdu_end_da_is_mcbc_get(buf);
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return hal_soc->ops->hal_rx_msdu_end_da_is_mcbc_get(buf);
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}
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}
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#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
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/**
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
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RX_MSDU_END_5_FIRST_MSDU_MASK, \
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RX_MSDU_END_5_FIRST_MSDU_LSB))
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/**
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* hal_rx_msdu_end_first_msdu_get: API to get first msdu status
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* hal_rx_msdu_end_first_msdu_get: API to get first msdu status
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* from rx_msdu_end TLV
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* from rx_msdu_end TLV
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* @hal_soc_hdl: hal soc handle
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* @buf: pointer to the start of RX PKT TLV headers
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*
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: first_msdu
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* Return: first_msdu
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*/
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*/
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static inline uint8_t
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static inline uint8_t
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hal_rx_msdu_end_first_msdu_get(uint8_t *buf)
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hal_rx_msdu_end_first_msdu_get(hal_soc_handle_t hal_soc_hdl,
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uint8_t *buf)
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{
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint8_t first_msdu;
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first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
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return hal_soc->ops->hal_rx_msdu_end_first_msdu_get(buf);
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return first_msdu;
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}
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}
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#define HAL_RX_MSDU_END_LAST_MSDU_GET(_rx_msdu_end) \
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#define HAL_RX_MSDU_END_LAST_MSDU_GET(_rx_msdu_end) \
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@@ -254,6 +254,25 @@ static void hal_rx_print_pn_6290(uint8_t *buf)
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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}
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}
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/**
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* hal_rx_msdu_end_first_msdu_get_6290: API to get first msdu status
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* from rx_msdu_end TLV
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*
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* @buf: pointer to the start of RX PKT TLV headers
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* Return: first_msdu
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*/
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static uint8_t
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hal_rx_msdu_end_first_msdu_get_6290(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint8_t first_msdu;
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first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
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return first_msdu;
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}
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struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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hal_srng_dst_hw_init_generic,
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@@ -303,6 +322,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = {
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hal_rx_msdu_end_l3_hdr_padding_get_6290,
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hal_rx_msdu_end_l3_hdr_padding_get_6290,
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hal_rx_encryption_info_valid_6290,
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hal_rx_encryption_info_valid_6290,
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hal_rx_print_pn_6290,
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hal_rx_print_pn_6290,
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hal_rx_msdu_end_first_msdu_get_6290,
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};
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};
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struct hal_hw_srng_config hw_srng_table_6290[] = {
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struct hal_hw_srng_config hw_srng_table_6290[] = {
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@@ -95,6 +95,12 @@
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_LSB))
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RX_MPDU_INFO_7_PN_127_96_LSB))
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#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
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RX_MSDU_END_5_FIRST_MSDU_MASK, \
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RX_MSDU_END_5_FIRST_MSDU_LSB))
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#if defined(QCA_WIFI_QCA6290_11AX)
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#if defined(QCA_WIFI_QCA6290_11AX)
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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@@ -254,6 +254,24 @@ static void hal_rx_print_pn_6390(uint8_t *buf)
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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}
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}
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/**
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* hal_rx_msdu_end_first_msduget_6390: API to get first msdu status
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* from rx_msdu_end TLV
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: first_msdu
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*/
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static uint8_t hal_rx_msdu_end_first_msdu_get_6390(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint8_t first_msdu;
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first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
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return first_msdu;
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}
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struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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hal_srng_dst_hw_init_generic,
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hal_srng_dst_hw_init_generic,
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@@ -303,6 +321,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = {
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hal_rx_msdu_end_l3_hdr_padding_get_6390,
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hal_rx_msdu_end_l3_hdr_padding_get_6390,
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hal_rx_encryption_info_valid_6390,
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hal_rx_encryption_info_valid_6390,
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hal_rx_print_pn_6390,
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hal_rx_print_pn_6390,
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hal_rx_msdu_end_first_msdu_get_6390,
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};
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};
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struct hal_hw_srng_config hw_srng_table_6390[] = {
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struct hal_hw_srng_config hw_srng_table_6390[] = {
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@@ -95,6 +95,12 @@
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_LSB))
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RX_MPDU_INFO_7_PN_127_96_LSB))
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#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
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RX_MSDU_END_5_FIRST_MSDU_MASK, \
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RX_MSDU_END_5_FIRST_MSDU_LSB))
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
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RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \
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RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \
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@@ -160,6 +160,24 @@ static void hal_rx_print_pn_6490(uint8_t *buf)
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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}
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}
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/**
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* hal_rx_msdu_end_first_msdu_get_6490: API to get first msdu status
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* from rx_msdu_end TLV
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: first_msdu
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*/
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static uint8_t hal_rx_msdu_end_first_msdu_get_6490(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint8_t first_msdu;
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first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
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return first_msdu;
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}
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struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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/* rx */
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/* rx */
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hal_rx_get_rx_fragment_number_6490,
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hal_rx_get_rx_fragment_number_6490,
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@@ -169,4 +187,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
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hal_rx_msdu_end_l3_hdr_padding_get_6490,
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hal_rx_msdu_end_l3_hdr_padding_get_6490,
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hal_rx_encryption_info_valid_6490,
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hal_rx_encryption_info_valid_6490,
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hal_rx_print_pn_6490,
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hal_rx_print_pn_6490,
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hal_rx_msdu_end_first_msdu_get_6490,
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};
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};
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@@ -75,3 +75,9 @@
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RX_MPDU_INFO_6_PN_127_96_OFFSET)), \
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RX_MPDU_INFO_6_PN_127_96_OFFSET)), \
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RX_MPDU_INFO_6_PN_127_96_MASK, \
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RX_MPDU_INFO_6_PN_127_96_MASK, \
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RX_MPDU_INFO_6_PN_127_96_LSB))
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RX_MPDU_INFO_6_PN_127_96_LSB))
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#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_10_FIRST_MSDU_OFFSET)), \
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RX_MSDU_END_10_FIRST_MSDU_MASK, \
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RX_MSDU_END_10_FIRST_MSDU_LSB))
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@@ -249,6 +249,24 @@ static void hal_rx_print_pn_8074v1(uint8_t *buf)
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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pn_127_96, pn_95_64, pn_63_32, pn_31_0);
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}
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}
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/**
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* hal_rx_msdu_end_first_msdu_get_8074v1: API to get first msdu status
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* from rx_msdu_end TLV
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*
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* @ buf: pointer to the start of RX PKT TLV headers
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* Return: first_msdu
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*/
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static uint8_t
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hal_rx_msdu_end_first_msdu_get_8074v1(uint8_t *buf)
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{
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struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
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struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
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uint8_t first_msdu;
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first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
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return first_msdu;
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}
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struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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/* init and setup */
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/* init and setup */
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@@ -299,6 +317,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = {
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hal_rx_msdu_end_l3_hdr_padding_get_8074v1,
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hal_rx_msdu_end_l3_hdr_padding_get_8074v1,
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hal_rx_encryption_info_valid_8074v1,
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hal_rx_encryption_info_valid_8074v1,
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hal_rx_print_pn_8074v1,
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hal_rx_print_pn_8074v1,
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hal_rx_msdu_end_first_msdu_get_8074v1,
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};
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};
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struct hal_hw_srng_config hw_srng_table_8074[] = {
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struct hal_hw_srng_config hw_srng_table_8074[] = {
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@@ -84,6 +84,12 @@
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_MASK, \
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RX_MPDU_INFO_7_PN_127_96_LSB))
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RX_MPDU_INFO_7_PN_127_96_LSB))
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#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
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(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
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RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
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RX_MSDU_END_5_FIRST_MSDU_MASK, \
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RX_MSDU_END_5_FIRST_MSDU_LSB))
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/*
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/*
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* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
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* hal_rx_msdu_start_nss_get_8074(): API to get the NSS
|
||||||
* Interval from rx_msdu_start
|
* Interval from rx_msdu_start
|
||||||
|
@@ -249,6 +249,24 @@ static void hal_rx_print_pn_8074v2(uint8_t *buf)
|
|||||||
pn_127_96, pn_95_64, pn_63_32, pn_31_0);
|
pn_127_96, pn_95_64, pn_63_32, pn_31_0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* hal_rx_msdu_end_first_msdu_get_8074v2: API to get first msdu status
|
||||||
|
* from rx_msdu_end TLV
|
||||||
|
*
|
||||||
|
* @ buf: pointer to the start of RX PKT TLV headers
|
||||||
|
* Return: first_msdu
|
||||||
|
*/
|
||||||
|
static uint8_t hal_rx_msdu_end_first_msdu_get_8074v2(uint8_t *buf)
|
||||||
|
{
|
||||||
|
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
|
||||||
|
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
|
||||||
|
uint8_t first_msdu;
|
||||||
|
|
||||||
|
first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
|
||||||
|
|
||||||
|
return first_msdu;
|
||||||
|
}
|
||||||
|
|
||||||
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
|
struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
|
||||||
|
|
||||||
/* init and setup */
|
/* init and setup */
|
||||||
@@ -299,6 +317,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = {
|
|||||||
hal_rx_msdu_end_l3_hdr_padding_get_8074v2,
|
hal_rx_msdu_end_l3_hdr_padding_get_8074v2,
|
||||||
hal_rx_encryption_info_valid_8074v2,
|
hal_rx_encryption_info_valid_8074v2,
|
||||||
hal_rx_print_pn_8074v2,
|
hal_rx_print_pn_8074v2,
|
||||||
|
hal_rx_msdu_end_first_msdu_get_8074v2,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct hal_hw_srng_config hw_srng_table_8074v2[] = {
|
struct hal_hw_srng_config hw_srng_table_8074v2[] = {
|
||||||
|
@@ -87,6 +87,12 @@
|
|||||||
RX_MPDU_INFO_7_PN_127_96_MASK, \
|
RX_MPDU_INFO_7_PN_127_96_MASK, \
|
||||||
RX_MPDU_INFO_7_PN_127_96_LSB))
|
RX_MPDU_INFO_7_PN_127_96_LSB))
|
||||||
|
|
||||||
|
#define HAL_RX_MSDU_END_FIRST_MSDU_GET(_rx_msdu_end) \
|
||||||
|
(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_msdu_end, \
|
||||||
|
RX_MSDU_END_5_FIRST_MSDU_OFFSET)), \
|
||||||
|
RX_MSDU_END_5_FIRST_MSDU_MASK, \
|
||||||
|
RX_MSDU_END_5_FIRST_MSDU_LSB))
|
||||||
|
|
||||||
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
|
#define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\
|
||||||
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
|
(_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\
|
||||||
RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \
|
RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \
|
||||||
|
@@ -258,6 +258,24 @@ static void hal_rx_print_pn_9000(uint8_t *buf)
|
|||||||
pn_127_96, pn_95_64, pn_63_32, pn_31_0);
|
pn_127_96, pn_95_64, pn_63_32, pn_31_0);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* hal_rx_msdu_end_first_msdu_get_9000: API to get first msdu status
|
||||||
|
* from rx_msdu_end TLV
|
||||||
|
*
|
||||||
|
* @ buf: pointer to the start of RX PKT TLV headers
|
||||||
|
* Return: first_msdu
|
||||||
|
*/
|
||||||
|
static uint8_t hal_rx_msdu_end_first_msdu_get_9000(uint8_t *buf)
|
||||||
|
{
|
||||||
|
struct rx_pkt_tlvs *pkt_tlvs = (struct rx_pkt_tlvs *)buf;
|
||||||
|
struct rx_msdu_end *msdu_end = &pkt_tlvs->msdu_end_tlv.rx_msdu_end;
|
||||||
|
uint8_t first_msdu;
|
||||||
|
|
||||||
|
first_msdu = HAL_RX_MSDU_END_FIRST_MSDU_GET(msdu_end);
|
||||||
|
|
||||||
|
return first_msdu;
|
||||||
|
}
|
||||||
|
|
||||||
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
||||||
|
|
||||||
/* init and setup */
|
/* init and setup */
|
||||||
@@ -308,6 +326,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = {
|
|||||||
hal_rx_msdu_end_l3_hdr_padding_get_9000,
|
hal_rx_msdu_end_l3_hdr_padding_get_9000,
|
||||||
hal_rx_encryption_info_valid_9000,
|
hal_rx_encryption_info_valid_9000,
|
||||||
hal_rx_print_pn_9000,
|
hal_rx_print_pn_9000,
|
||||||
|
hal_rx_msdu_end_first_msdu_get_9000,
|
||||||
};
|
};
|
||||||
|
|
||||||
struct hal_hw_srng_config hw_srng_table_9000[] = {
|
struct hal_hw_srng_config hw_srng_table_9000[] = {
|
||||||
|
Reference in New Issue
Block a user