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msm: camera: isp: Enable line smoothing in RDI path for CSID 780

For spectra 780, PIX store support is added for RDI resource.
RDI PIX store is used to minimize the peak data rate in the sfe.

This change adds support of the PIX store in the RDI path.
This feature should enable for all use-cases on the RDI0
channel in CSID to lower the ife Clock frequency.

CRs-Fixed: 2948116
Change-Id: I3f82d13ad60e3b8dec7c59229ec89eecf9d84682
Signed-off-by: Chandan Kumar Jha <[email protected]>
Chandan Kumar Jha 3 роки тому
батько
коміт
ca0de16b62

+ 11 - 5
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid780.h

@@ -628,7 +628,8 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.capabilities                     = CAM_IFE_CSID_CAP_INPUT_LCR |
 							CAM_IFE_CSID_CAP_MIPI10_UNPACK |
 							CAM_IFE_CSID_CAP_MIPI12_UNPACK |
-							CAM_IFE_CSID_CAP_MIPI14_UNPACK,
+							CAM_IFE_CSID_CAP_MIPI14_UNPACK |
+							CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI,
 		.overflow_ctrl_mode_val           = 0x8,
 		.offline_mode_supported           = 1,
 		.mipi_pack_supported              = 1,
@@ -652,6 +653,7 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.top_irq_mask                     = 0x100,
 		.epoch0_shift_val                 = 16,
 		.epoch1_shift_val                 = 0,
+		.pix_store_en_shift_val           = 10,
 };
 
 static struct cam_ife_csid_ver2_path_reg_info
@@ -726,7 +728,8 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.capabilities                     = CAM_IFE_CSID_CAP_INPUT_LCR |
 							CAM_IFE_CSID_CAP_MIPI10_UNPACK |
 							CAM_IFE_CSID_CAP_MIPI12_UNPACK |
-							CAM_IFE_CSID_CAP_MIPI14_UNPACK,
+							CAM_IFE_CSID_CAP_MIPI14_UNPACK |
+							CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI,
 		.overflow_ctrl_mode_val           = 0x8,
 		.mipi_pack_supported              = 1,
 		.offline_mode_supported           = 1,
@@ -750,6 +753,7 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.top_irq_mask                     = 0x200,
 		.epoch0_shift_val                 = 16,
 		.epoch1_shift_val                 = 0,
+		.pix_store_en_shift_val           = 10,
 };
 
 static struct cam_ife_csid_ver2_path_reg_info
@@ -824,7 +828,8 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.capabilities                     = CAM_IFE_CSID_CAP_INPUT_LCR |
 							CAM_IFE_CSID_CAP_MIPI10_UNPACK |
 							CAM_IFE_CSID_CAP_MIPI12_UNPACK |
-							CAM_IFE_CSID_CAP_MIPI14_UNPACK,
+							CAM_IFE_CSID_CAP_MIPI14_UNPACK |
+							CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI,
 		.overflow_ctrl_mode_val           = 0x8,
 		.mipi_pack_supported              = 1,
 		.offline_mode_supported           = 1,
@@ -848,6 +853,7 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.top_irq_mask                     = 0x400,
 		.epoch0_shift_val                 = 16,
 		.epoch1_shift_val                 = 0,
+		.pix_store_en_shift_val           = 10,
 };
 
 static struct cam_ife_csid_ver2_path_reg_info
@@ -1036,8 +1042,8 @@ static struct cam_ife_csid_ver2_path_reg_info
 		.camif_irq_mask                  = 0x800000,
 		.rup_aup_mask                    = 0x1000100,
 		.top_irq_mask                    = 0x1000,
-		.epoch0_shift_val                 = 16,
-		.epoch1_shift_val                 = 0,
+		.epoch0_shift_val                = 16,
+		.epoch1_shift_val                = 0,
 };
 
 static struct cam_ife_csid_csi2_rx_reg_info

+ 2 - 0
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_common.h

@@ -40,6 +40,8 @@
 #define CAM_IFE_CSID_CAP_MIPI14_UNPACK                    0x10
 #define CAM_IFE_CSID_CAP_MIPI16_UNPACK                    0x20
 #define CAM_IFE_CSID_CAP_MIPI20_UNPACK                    0x40
+#define CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI            0x80
+
 /*
  * Debug values enable the corresponding interrupts and debug logs provide
  * necessary information

+ 6 - 0
drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -2827,6 +2827,12 @@ static int cam_ife_csid_ver2_init_config_rdi_path(
 			(cmn_reg->timestamp_strobe_val <<
 				cmn_reg->timestamp_stb_sel_shift_val);
 
+	/* We use line smoothting only on RDI_0 in all usecases */
+	if ((path_reg->capabilities &
+		CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI) &&
+		(res->res_id == CAM_IFE_PIX_PATH_RES_RDI_0))
+		cfg1 |= 1 << path_reg->pix_store_en_shift_val;
+
 	cam_io_w_mb(cfg1, mem_base + path_reg->cfg1_addr);
 
 	/* set frame drop pattern to 0 and period to 1 */