qcacmn: Set the reo destination ring ctrl register
The reo destination ctrl registers HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR and HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR are used for mapping msdu packets to different reo rings. For QCA6390, reo remap values varied from 0 - 7 so every 3 bits in the register were used to map to a particular reo ring. For QCA6490, reo remap values vary from 0 - 9 as two extra reo rings are added so we are using 4 bits in the register to map to a particular reo ring. Use the macros directly provided in the header files to map reo rings. Change-Id: I6d64266d3b388b3453b7df959048e3d693cf0a40 CRs-Fixed: 2544102
This commit is contained in:
Venkata Sharath Chandra Manchala
committed by
nshrivas
nshrivas
parent
5939199242
commit
c9e344de3d
@@ -758,25 +758,29 @@ QDF_STATUS dp_ipa_enable_autonomy(struct cdp_pdev *ppdev)
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return QDF_STATUS_SUCCESS;
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/* Call HAL API to remap REO rings to REO2IPA ring */
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ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW4) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW4) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW4) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW4) |
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HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
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HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
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HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 3) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW4, 4) |
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HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
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ix2 = ((REO_REMAP_SW4 << 0) | (REO_REMAP_SW4 << 3) |
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(REO_REMAP_SW4 << 6) | (REO_REMAP_SW4 << 9) |
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(REO_REMAP_SW4 << 12) | (REO_REMAP_SW4 << 15) |
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(REO_REMAP_SW4 << 18) | (REO_REMAP_SW4 << 21)) << 8;
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hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
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&ix2, &ix2);
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ix2 = HAL_REO_REMAP_IX2(REO_REMAP_SW4, 16) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 17) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 20) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 22) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
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}
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hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
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&ix2, &ix2);
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return QDF_STATUS_SUCCESS;
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}
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@@ -800,14 +804,14 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_pdev *ppdev)
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return QDF_STATUS_SUCCESS;
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/* Call HAL API to remap REO rings to REO2IPA ring */
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ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW1) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW2) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW3) |
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HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW2) |
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HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) |
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HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) |
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HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW);
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ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
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HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
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HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
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HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
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if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
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dp_reo_remap_config(soc, &ix2, &ix3);
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@@ -2592,11 +2592,23 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
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*/
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bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
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{
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*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
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(0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
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*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 20) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 21) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 23);
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*remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
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(0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
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*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW3, 24) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 26) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 27) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
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dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
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@@ -2608,37 +2620,69 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
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uint32_t *remap2)
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{
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uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
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uint8_t target_type;
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target_type = hal_get_target_type(soc->hal_soc);
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switch (offload_radio) {
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case dp_nss_cfg_default:
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*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
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(0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
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(0x3 << 18) | (0x4 << 21)) << 8;
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*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW1, 20) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 21) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 22) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
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*remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
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(0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
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(0x3 << 18) | (0x4 << 21)) << 8;
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*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW1, 24) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 31);
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break;
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case dp_nss_cfg_first_radio:
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*remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
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(0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
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(0x2 << 18) | (0x3 << 21)) << 8;
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*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW2, 16) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 19) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW2, 22) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
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*remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
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(0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
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(0x4 << 18) | (0x2 << 21)) << 8;
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*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 28) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW2, 31);
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break;
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case dp_nss_cfg_second_radio:
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*remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
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(0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
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(0x1 << 18) | (0x3 << 21)) << 8;
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*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
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HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
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*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
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HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
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*remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
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(0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
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(0x4 << 18) | (0x1 << 21)) << 8;
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break;
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case dp_nss_cfg_dbdc:
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case dp_nss_cfg_dbtc:
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/* return false if both or all are offloaded to NSS */
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@@ -2649,7 +2693,7 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
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*remap1, *remap2, offload_radio);
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return true;
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}
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#endif
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#endif /* IPA_OFFLOAD */
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/*
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* dp_reo_frag_dst_set() - configure reo register to set the
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@@ -537,16 +537,31 @@ extern void *hal_srng_setup(void *hal_soc, int ring_type, int ring_num,
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#define REO_REMAP_UNUSED 7
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/*
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* currently this macro only works for IX0 since all the rings we are remapping
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* can be remapped from HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0
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* Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0
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* to map destination to rings
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*/
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#define HAL_REO_REMAP_VAL(_ORIGINAL_DEST, _NEW_DEST) \
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HAL_REO_REMAP_VAL_(_ORIGINAL_DEST, _NEW_DEST)
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/* allow the destination macros to be expanded */
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#define HAL_REO_REMAP_VAL_(_ORIGINAL_DEST, _NEW_DEST) \
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(_NEW_DEST << \
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#define HAL_REO_REMAP_IX0(_VALUE, _OFFSET) \
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((_VALUE) << \
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(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_DEST_RING_MAPPING_ ## \
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_ORIGINAL_DEST ## _SHFT))
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_OFFSET ## _SHFT))
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/*
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* Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1
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* to map destination to rings
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*/
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#define HAL_REO_REMAP_IX2(_VALUE, _OFFSET) \
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((_VALUE) << \
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(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_DEST_RING_MAPPING_ ## \
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_OFFSET ## _SHFT))
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/*
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* Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3
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* to map destination to rings
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*/
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#define HAL_REO_REMAP_IX3(_VALUE, _OFFSET) \
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((_VALUE) << \
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(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_DEST_RING_MAPPING_ ## \
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_OFFSET ## _SHFT))
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/**
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* hal_reo_read_write_ctrl_ix - Read or write REO_DESTINATION_RING_CTRL_IX
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@@ -1512,22 +1512,21 @@ static void hal_reo_setup_generic(struct hal_soc *soc,
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SEQ_WCSS_UMAC_REO_REG_OFFSET),
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reo_params->remap1);
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x"),
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HAL_REG_READ(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET)));
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hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x",
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HAL_REG_READ(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET)));
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HAL_REG_WRITE(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET),
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reo_params->remap2);
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QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
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FL("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR 0x%x"),
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HAL_REG_READ(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET)));
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hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR 0x%x",
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HAL_REG_READ(soc,
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HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
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SEQ_WCSS_UMAC_REO_REG_OFFSET)));
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}
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