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qcacmn: Set the reo destination ring ctrl register

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The reo destination ctrl registers
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR and
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR are used for mapping
msdu packets to different reo rings.
For QCA6390,
reo remap values varied from 0 - 7 so every 3 bits in
the register were used to map to a particular reo ring.
For QCA6490,
reo remap values vary from 0 - 9 as two extra reo rings are
added so we are using 4 bits in the register to map to a
particular reo ring.
Use the macros directly provided in the header files
to map reo rings.

Change-Id: I6d64266d3b388b3453b7df959048e3d693cf0a40
CRs-Fixed: 2544102
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-10-23 14:13:14 -07:00
committed by nshrivas
parent 5939199242
commit c9e344de3d
4 changed files with 128 additions and 66 deletions
Download Patch File Download Diff File Expand all files Collapse all files

50
dp/wifi3.0/dp_ipa.c
View File

@@ -758,25 +758,29 @@ QDF_STATUS dp_ipa_enable_autonomy(struct cdp_pdev *ppdev)
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;
/* Call HAL API to remap REO rings to REO2IPA ring */ /* Call HAL API to remap REO rings to REO2IPA ring */
ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) | ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW4) | HAL_REO_REMAP_IX0(REO_REMAP_SW4, 1) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW4) | HAL_REO_REMAP_IX0(REO_REMAP_SW4, 2) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW4) | HAL_REO_REMAP_IX0(REO_REMAP_SW4, 3) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW4) | HAL_REO_REMAP_IX0(REO_REMAP_SW4, 4) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) | HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) | HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW); HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) { if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
ix2 = ((REO_REMAP_SW4 << 0) | (REO_REMAP_SW4 << 3) | ix2 = HAL_REO_REMAP_IX2(REO_REMAP_SW4, 16) |
(REO_REMAP_SW4 << 6) | (REO_REMAP_SW4 << 9) | HAL_REO_REMAP_IX2(REO_REMAP_SW4, 17) |
(REO_REMAP_SW4 << 12) | (REO_REMAP_SW4 << 15) | HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
(REO_REMAP_SW4 << 18) | (REO_REMAP_SW4 << 21)) << 8; HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 20) |
hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL, HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
&ix2, &ix2); HAL_REO_REMAP_IX2(REO_REMAP_SW4, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
} }
hal_reo_read_write_ctrl_ix(soc->hal_soc, false, &ix0, NULL,
&ix2, &ix2);
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;
} }
@@ -800,14 +804,14 @@ QDF_STATUS dp_ipa_disable_autonomy(struct cdp_pdev *ppdev)
return QDF_STATUS_SUCCESS; return QDF_STATUS_SUCCESS;
/* Call HAL API to remap REO rings to REO2IPA ring */ /* Call HAL API to remap REO rings to REO2IPA ring */
ix0 = HAL_REO_REMAP_VAL(REO_REMAP_TCL, REO_REMAP_TCL) | ix0 = HAL_REO_REMAP_IX0(REO_REMAP_TCL, 0) |
HAL_REO_REMAP_VAL(REO_REMAP_SW1, REO_REMAP_SW1) | HAL_REO_REMAP_IX0(REO_REMAP_SW1, 1) |
HAL_REO_REMAP_VAL(REO_REMAP_SW2, REO_REMAP_SW2) | HAL_REO_REMAP_IX0(REO_REMAP_SW2, 2) |
HAL_REO_REMAP_VAL(REO_REMAP_SW3, REO_REMAP_SW3) | HAL_REO_REMAP_IX0(REO_REMAP_SW3, 3) |
HAL_REO_REMAP_VAL(REO_REMAP_SW4, REO_REMAP_SW2) | HAL_REO_REMAP_IX0(REO_REMAP_SW2, 4) |
HAL_REO_REMAP_VAL(REO_REMAP_RELEASE, REO_REMAP_RELEASE) | HAL_REO_REMAP_IX0(REO_REMAP_RELEASE, 5) |
HAL_REO_REMAP_VAL(REO_REMAP_FW, REO_REMAP_FW) | HAL_REO_REMAP_IX0(REO_REMAP_FW, 6) |
HAL_REO_REMAP_VAL(REO_REMAP_UNUSED, REO_REMAP_FW); HAL_REO_REMAP_IX0(REO_REMAP_FW, 7);
if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) { if (wlan_cfg_is_rx_hash_enabled(soc->wlan_cfg_ctx)) {
dp_reo_remap_config(soc, &ix2, &ix3); dp_reo_remap_config(soc, &ix2, &ix3);

94
dp/wifi3.0/dp_main.c
View File

@@ -2592,11 +2592,23 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
*/ */
bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2) bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
{ {
*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) | *remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
(0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8; HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 23);
*remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) | *remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW3, 24) |
(0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8; HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
dp_debug("remap1 %x remap2 %x", *remap1, *remap2); dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
@@ -2608,37 +2620,69 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
uint32_t *remap2) uint32_t *remap2)
{ {
uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx); uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
uint8_t target_type;
target_type = hal_get_target_type(soc->hal_soc);
switch (offload_radio) { switch (offload_radio) {
case dp_nss_cfg_default: case dp_nss_cfg_default:
*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | *remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
(0x4 << 9) | (0x1 << 12) | (0x2 << 15) | HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
(0x3 << 18) | (0x4 << 21)) << 8; HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
*remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | *remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW1, 24) |
(0x4 << 9) | (0x1 << 12) | (0x2 << 15) | HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
(0x3 << 18) | (0x4 << 21)) << 8; HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 31);
break; break;
case dp_nss_cfg_first_radio: case dp_nss_cfg_first_radio:
*remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) | *remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW2, 16) |
(0x2 << 9) | (0x3 << 12) | (0x4 << 15) | HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
(0x2 << 18) | (0x3 << 21)) << 8; HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) | *remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
(0x4 << 9) | (0x2 << 12) | (0x3 << 15) | HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
(0x4 << 18) | (0x2 << 21)) << 8; HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 31);
break; break;
case dp_nss_cfg_second_radio: case dp_nss_cfg_second_radio:
*remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) | *remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
(0x1 << 9) | (0x3 << 12) | (0x4 << 15) | HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
(0x1 << 18) | (0x3 << 21)) << 8; HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
*remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
(0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
(0x4 << 18) | (0x1 << 21)) << 8;
break; break;
case dp_nss_cfg_dbdc: case dp_nss_cfg_dbdc:
case dp_nss_cfg_dbtc: case dp_nss_cfg_dbtc:
/* return false if both or all are offloaded to NSS */ /* return false if both or all are offloaded to NSS */
@@ -2649,7 +2693,7 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
*remap1, *remap2, offload_radio); *remap1, *remap2, offload_radio);
return true; return true;
} }
#endif #endif /* IPA_OFFLOAD */
/* /*
* dp_reo_frag_dst_set() - configure reo register to set the * dp_reo_frag_dst_set() - configure reo register to set the

31
hal/wifi3.0/hal_api.h
View File

@@ -537,16 +537,31 @@ extern void *hal_srng_setup(void *hal_soc, int ring_type, int ring_num,
#define REO_REMAP_UNUSED 7 #define REO_REMAP_UNUSED 7
/* /*
* currently this macro only works for IX0 since all the rings we are remapping * Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0
* can be remapped from HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0 * to map destination to rings
*/ */
#define HAL_REO_REMAP_VAL(_ORIGINAL_DEST, _NEW_DEST) \ #define HAL_REO_REMAP_IX0(_VALUE, _OFFSET) \
HAL_REO_REMAP_VAL_(_ORIGINAL_DEST, _NEW_DEST) ((_VALUE) << \
/* allow the destination macros to be expanded */
#define HAL_REO_REMAP_VAL_(_ORIGINAL_DEST, _NEW_DEST) \
(_NEW_DEST << \
(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_DEST_RING_MAPPING_ ## \ (HWIO_REO_R0_DESTINATION_RING_CTRL_IX_0_DEST_RING_MAPPING_ ## \
_ORIGINAL_DEST ## _SHFT)) _OFFSET ## _SHFT))
/*
* Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_1
* to map destination to rings
*/
#define HAL_REO_REMAP_IX2(_VALUE, _OFFSET) \
((_VALUE) << \
(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_DEST_RING_MAPPING_ ## \
_OFFSET ## _SHFT))
/*
* Macro to access HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3
* to map destination to rings
*/
#define HAL_REO_REMAP_IX3(_VALUE, _OFFSET) \
((_VALUE) << \
(HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_DEST_RING_MAPPING_ ## \
_OFFSET ## _SHFT))
/** /**
* hal_reo_read_write_ctrl_ix - Read or write REO_DESTINATION_RING_CTRL_IX * hal_reo_read_write_ctrl_ix - Read or write REO_DESTINATION_RING_CTRL_IX

19
hal/wifi3.0/hal_generic_api.h
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@@ -1512,22 +1512,21 @@ static void hal_reo_setup_generic(struct hal_soc *soc,
SEQ_WCSS_UMAC_REO_REG_OFFSET), SEQ_WCSS_UMAC_REO_REG_OFFSET),
reo_params->remap1); reo_params->remap1);
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x",
FL("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR 0x%x"), HAL_REG_READ(soc,
HAL_REG_READ(soc, HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR(
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR( SEQ_WCSS_UMAC_REO_REG_OFFSET)));
SEQ_WCSS_UMAC_REO_REG_OFFSET)));
HAL_REG_WRITE(soc, HAL_REG_WRITE(soc,
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR( HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
SEQ_WCSS_UMAC_REO_REG_OFFSET), SEQ_WCSS_UMAC_REO_REG_OFFSET),
reo_params->remap2); reo_params->remap2);
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR, hal_debug("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR 0x%x",
FL("HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR 0x%x"), HAL_REG_READ(soc,
HAL_REG_READ(soc, HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR(
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR( SEQ_WCSS_UMAC_REO_REG_OFFSET)));
SEQ_WCSS_UMAC_REO_REG_OFFSET)));
} }