qcacmn: Set the reo destination ring ctrl register

The reo destination ctrl registers
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_2_ADDR and
HWIO_REO_R0_DESTINATION_RING_CTRL_IX_3_ADDR are used for mapping
msdu packets to different reo rings.
For QCA6390,
reo remap values varied from 0 - 7 so every 3 bits in
the register were used to map to a particular reo ring.
For QCA6490,
reo remap values vary from 0 - 9 as two extra reo rings are
added so we are using 4 bits in the register to map to a
particular reo ring.
Use the macros directly provided in the header files
to map reo rings.

Change-Id: I6d64266d3b388b3453b7df959048e3d693cf0a40
CRs-Fixed: 2544102
This commit is contained in:
Venkata Sharath Chandra Manchala
2019-10-23 14:13:14 -07:00
committed by nshrivas
parent 5939199242
commit c9e344de3d
4 changed files with 128 additions and 66 deletions

View File

@@ -2592,11 +2592,23 @@ static void dp_soc_reset_intr_mask(struct dp_soc *soc)
*/
bool dp_reo_remap_config(struct dp_soc *soc, uint32_t *remap1, uint32_t *remap2)
{
*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) | (0x1 << 9) |
(0x2 << 12) | (0x3 << 15) | (0x1 << 18) | (0x2 << 21)) << 8;
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 23);
*remap2 = ((0x3 << 0) | (0x1 << 3) | (0x2 << 6) | (0x3 << 9) |
(0x1 << 12) | (0x2 << 15) | (0x3 << 18) | (0x1 << 21)) << 8;
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW3, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
dp_debug("remap1 %x remap2 %x", *remap1, *remap2);
@@ -2608,37 +2620,69 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
uint32_t *remap2)
{
uint8_t offload_radio = wlan_cfg_get_dp_soc_nss_cfg(soc->wlan_cfg_ctx);
uint8_t target_type;
target_type = hal_get_target_type(soc->hal_soc);
switch (offload_radio) {
case dp_nss_cfg_default:
*remap1 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
(0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
(0x3 << 18) | (0x4 << 21)) << 8;
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 23);
*remap2 = ((0x1 << 0) | (0x2 << 3) | (0x3 << 6) |
(0x4 << 9) | (0x1 << 12) | (0x2 << 15) |
(0x3 << 18) | (0x4 << 21)) << 8;
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW1, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 31);
break;
case dp_nss_cfg_first_radio:
*remap1 = ((0x2 << 0) | (0x3 << 3) | (0x4 << 6) |
(0x2 << 9) | (0x3 << 12) | (0x4 << 15) |
(0x2 << 18) | (0x3 << 21)) << 8;
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW2, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW2, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = ((0x4 << 0) | (0x2 << 3) | (0x3 << 6) |
(0x4 << 9) | (0x2 << 12) | (0x3 << 15) |
(0x4 << 18) | (0x2 << 21)) << 8;
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW2, 31);
break;
case dp_nss_cfg_second_radio:
*remap1 = ((0x1 << 0) | (0x3 << 3) | (0x4 << 6) |
(0x1 << 9) | (0x3 << 12) | (0x4 << 15) |
(0x1 << 18) | (0x3 << 21)) << 8;
*remap1 = HAL_REO_REMAP_IX2(REO_REMAP_SW1, 16) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 17) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 18) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 19) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 20) |
HAL_REO_REMAP_IX2(REO_REMAP_SW4, 21) |
HAL_REO_REMAP_IX2(REO_REMAP_SW1, 22) |
HAL_REO_REMAP_IX2(REO_REMAP_SW3, 23);
*remap2 = HAL_REO_REMAP_IX3(REO_REMAP_SW4, 24) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 25) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 26) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 27) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 28) |
HAL_REO_REMAP_IX3(REO_REMAP_SW3, 29) |
HAL_REO_REMAP_IX3(REO_REMAP_SW4, 30) |
HAL_REO_REMAP_IX3(REO_REMAP_SW1, 31);
*remap2 = ((0x4 << 0) | (0x1 << 3) | (0x3 << 6) |
(0x4 << 9) | (0x1 << 12) | (0x3 << 15) |
(0x4 << 18) | (0x1 << 21)) << 8;
break;
case dp_nss_cfg_dbdc:
case dp_nss_cfg_dbtc:
/* return false if both or all are offloaded to NSS */
@@ -2649,7 +2693,7 @@ static bool dp_reo_remap_config(struct dp_soc *soc,
*remap1, *remap2, offload_radio);
return true;
}
#endif
#endif /* IPA_OFFLOAD */
/*
* dp_reo_frag_dst_set() - configure reo register to set the