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@@ -4059,10 +4059,9 @@ void reg_dmav2_setup_dspp_igcv32(struct sde_hw_dspp *ctx, void *cfg)
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data[j++] = (u16)(lut_cfg->c0[i] << 4);
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data[j++] = (u16)(lut_cfg->c1[i] << 4);
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}
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- data[j++] = (u16)(lut_cfg->c2_last << 4);
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- data[j++] = (u16)(lut_cfg->c0_last << 4);
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- data[j++] = (u16)(lut_cfg->c1_last << 4);
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-
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+ data[j++] = (4095 << 4);
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+ data[j++] = (4095 << 4);
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+ data[j++] = (4095 << 4);
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REG_DMA_SETUP_OPS(dma_write_cfg, 0, (u32 *)data, len,
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REG_BLK_LUT_WRITE, 0, 0, 0);
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/* table select is only relevant to SSPP Gamut */
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@@ -4146,9 +4145,10 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg)
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struct sde_reg_dma_setup_ops_cfg dma_write_cfg;
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struct drm_msm_3d_gamut *payload;
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int rc;
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- u32 num_of_mixers, blk = 0, i, j, k = 0, len;
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+ u32 num_of_mixers, blk = 0, i, j, k = 0, len, tmp;
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u32 op_mode, scale_offset, scale_tbl_offset, transfer_size_bytes;
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u16 *data;
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+ u32 scale_off[GAMUT_3D_SCALE_OFF_TBL_NUM][GAMUT_3D_SCALE_OFF_SZ];
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rc = reg_dma_dspp_check(ctx, cfg, GAMUT);
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if (rc)
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@@ -4244,13 +4244,26 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg)
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goto exit;
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}
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+ if (payload && (payload->flags & GAMUT_3D_MAP_EN)) {
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+ for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) {
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+ for (j = 0; j < GAMUT_3D_SCALE_OFF_SZ; j++) {
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+ scale_off[i][j] = payload->scale_off[i][j];
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+ tmp = scale_off[i][j] & 0x1ffff000;
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+ scale_off[i][j] &= 0xfff;
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+ tmp = tmp << 3;
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+ scale_off[i][j] =
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+ tmp | scale_off[i][j];
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+ }
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+ }
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+ }
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+
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if (op_mode & GAMUT_MAP_EN) {
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for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) {
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scale_tbl_offset = ctx->cap->sblk->gamut.base +
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scale_offset +
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(i * GAMUT_SCALE_OFF_LEN);
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REG_DMA_SETUP_OPS(dma_write_cfg, scale_tbl_offset,
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- &payload->scale_off[i][0],
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+ &scale_off[i][0],
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GAMUT_SCALE_OFF_LEN,
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REG_BLK_WRITE_SINGLE, 0, 0, 0);
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rc = dma_ops->setup_payload(&dma_write_cfg);
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