Merge "msm: camera: common: Fix dma_attr_t types" into camera-kernel.lnx.5.0
This commit is contained in:

committed by
Gerrit - the friendly Code Review server

commit
c6903209f2
@@ -1065,7 +1065,7 @@ int cam_hw_cdm_submit_bl(struct cam_hw_info *cdm_hw,
|
|||||||
}
|
}
|
||||||
rc = 0;
|
rc = 0;
|
||||||
hw_vaddr_ptr =
|
hw_vaddr_ptr =
|
||||||
(uint64_t)cdm_cmd->cmd[i].bl_addr.hw_iova;
|
(dma_addr_t)cdm_cmd->cmd[i].bl_addr.hw_iova;
|
||||||
len = cdm_cmd->cmd[i].len + cdm_cmd->cmd[i].offset;
|
len = cdm_cmd->cmd[i].len + cdm_cmd->cmd[i].offset;
|
||||||
} else {
|
} else {
|
||||||
CAM_ERR(CAM_CDM,
|
CAM_ERR(CAM_CDM,
|
||||||
|
@@ -82,7 +82,7 @@ struct cam_hw_update_entry {
|
|||||||
struct cam_hw_fence_map_entry {
|
struct cam_hw_fence_map_entry {
|
||||||
uint32_t resource_handle;
|
uint32_t resource_handle;
|
||||||
int32_t sync_id;
|
int32_t sync_id;
|
||||||
int32_t image_buf_addr[CAM_PACKET_MAX_PLANES];
|
dma_addr_t image_buf_addr[CAM_PACKET_MAX_PLANES];
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@@ -2105,6 +2105,7 @@ static void cam_cre_mgr_print_io_bufs(struct cam_packet *packet,
|
|||||||
rc, io_cfg[i].mem_handle[j]);
|
rc, io_cfg[i].mem_handle[j]);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((iova_addr & 0xFFFFFFFF) != iova_addr) {
|
if ((iova_addr & 0xFFFFFFFF) != iova_addr) {
|
||||||
CAM_ERR(CAM_CRE, "Invalid mapped address");
|
CAM_ERR(CAM_CRE, "Invalid mapped address");
|
||||||
rc = -EINVAL;
|
rc = -EINVAL;
|
||||||
@@ -2112,14 +2113,13 @@ static void cam_cre_mgr_print_io_bufs(struct cam_packet *packet,
|
|||||||
}
|
}
|
||||||
|
|
||||||
CAM_INFO(CAM_CRE,
|
CAM_INFO(CAM_CRE,
|
||||||
"pln %d dir %d w %d h %d s %u sh %u sz %d addr 0x%x off 0x%x memh %x",
|
"pln %d dir %d w %d h %d s %u sh %u sz %zu addr 0x%llx off 0x%x memh %x",
|
||||||
j, io_cfg[i].direction,
|
j, io_cfg[i].direction,
|
||||||
io_cfg[i].planes[j].width,
|
io_cfg[i].planes[j].width,
|
||||||
io_cfg[i].planes[j].height,
|
io_cfg[i].planes[j].height,
|
||||||
io_cfg[i].planes[j].plane_stride,
|
io_cfg[i].planes[j].plane_stride,
|
||||||
io_cfg[i].planes[j].slice_height,
|
io_cfg[i].planes[j].slice_height,
|
||||||
(int32_t)src_buf_size,
|
src_buf_size, iova_addr,
|
||||||
(unsigned int)iova_addr,
|
|
||||||
io_cfg[i].offsets[j],
|
io_cfg[i].offsets[j],
|
||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
|
|
||||||
|
@@ -4488,6 +4488,7 @@ static int cam_icp_mgr_process_cmd_desc(struct cam_icp_hw_mgr *hw_mgr,
|
|||||||
num_cmd_buf--;
|
num_cmd_buf--;
|
||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
/* FW buffers are expected to be within 32-bit address range */
|
||||||
*fw_cmd_buf_iova_addr = addr;
|
*fw_cmd_buf_iova_addr = addr;
|
||||||
|
|
||||||
if ((cmd_desc[i].offset >= len) ||
|
if ((cmd_desc[i].offset >= len) ||
|
||||||
@@ -4634,6 +4635,7 @@ static int cam_icp_process_stream_settings(
|
|||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* FW/CDM buffers are expected to be mapped in 32-bit address range */
|
||||||
map_cmd->mem_map_region_sets[i].start_addr = (uint32_t)iova +
|
map_cmd->mem_map_region_sets[i].start_addr = (uint32_t)iova +
|
||||||
(cmd_mem_regions->map_info_array[i].offset);
|
(cmd_mem_regions->map_info_array[i].offset);
|
||||||
map_cmd->mem_map_region_sets[i].len = (uint32_t) len;
|
map_cmd->mem_map_region_sets[i].len = (uint32_t) len;
|
||||||
@@ -5054,14 +5056,13 @@ static void cam_icp_mgr_print_io_bufs(struct cam_packet *packet,
|
|||||||
}
|
}
|
||||||
|
|
||||||
CAM_INFO(CAM_ICP,
|
CAM_INFO(CAM_ICP,
|
||||||
"pln %d dir %d w %d h %d s %u sh %u sz %d addr 0x%x off 0x%x memh %x",
|
"pln %d dir %d w %d h %d s %u sh %u sz %zu addr 0x%llx off 0x%x memh %x",
|
||||||
j, io_cfg[i].direction,
|
j, io_cfg[i].direction,
|
||||||
io_cfg[i].planes[j].width,
|
io_cfg[i].planes[j].width,
|
||||||
io_cfg[i].planes[j].height,
|
io_cfg[i].planes[j].height,
|
||||||
io_cfg[i].planes[j].plane_stride,
|
io_cfg[i].planes[j].plane_stride,
|
||||||
io_cfg[i].planes[j].slice_height,
|
io_cfg[i].planes[j].slice_height,
|
||||||
(int32_t)src_buf_size,
|
src_buf_size, iova_addr,
|
||||||
(unsigned int)iova_addr,
|
|
||||||
io_cfg[i].offsets[j],
|
io_cfg[i].offsets[j],
|
||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
|
|
||||||
@@ -5881,6 +5882,7 @@ static int cam_icp_mgr_acquire_hw(void *hw_mgr_priv, void *acquire_hw_args)
|
|||||||
|
|
||||||
CAM_DBG(CAM_ICP, "acquire io buf handle %d",
|
CAM_DBG(CAM_ICP, "acquire io buf handle %d",
|
||||||
icp_dev_acquire_info->io_config_cmd_handle);
|
icp_dev_acquire_info->io_config_cmd_handle);
|
||||||
|
/* FW/CDM buffers are expected to be mapped in 32-bit address range */
|
||||||
rc = cam_mem_get_io_buf(
|
rc = cam_mem_get_io_buf(
|
||||||
icp_dev_acquire_info->io_config_cmd_handle,
|
icp_dev_acquire_info->io_config_cmd_handle,
|
||||||
hw_mgr->iommu_hdl,
|
hw_mgr->iommu_hdl,
|
||||||
|
@@ -8854,6 +8854,7 @@ static int cam_ife_mgr_util_insert_frame_header(
|
|||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/* CDM buffer is within 32-bit address space */
|
||||||
frame_header_iova = (uint32_t)iova_addr;
|
frame_header_iova = (uint32_t)iova_addr;
|
||||||
frame_header_iova += kmd_buf->offset;
|
frame_header_iova += kmd_buf->offset;
|
||||||
|
|
||||||
@@ -10089,20 +10090,14 @@ static void cam_ife_mgr_print_io_bufs(struct cam_ife_hw_mgr *hw_mgr,
|
|||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
if ((iova_addr & 0xFFFFFFFF) != iova_addr) {
|
|
||||||
CAM_ERR(CAM_ISP, "Invalid mapped address");
|
|
||||||
continue;
|
|
||||||
}
|
|
||||||
|
|
||||||
CAM_INFO(CAM_ISP,
|
CAM_INFO(CAM_ISP,
|
||||||
"pln %d w %d h %d s %u size 0x%x addr 0x%x end_addr 0x%x offset %x memh %x",
|
"pln %d w %d h %d s %u size %zu addr 0x%llx end_addr 0x%llx offset %x memh %x",
|
||||||
j, io_cfg[i].planes[j].width,
|
j, io_cfg[i].planes[j].width,
|
||||||
io_cfg[i].planes[j].height,
|
io_cfg[i].planes[j].height,
|
||||||
io_cfg[i].planes[j].plane_stride,
|
io_cfg[i].planes[j].plane_stride,
|
||||||
(unsigned int)src_buf_size,
|
src_buf_size, iova_addr,
|
||||||
(unsigned int)iova_addr,
|
iova_addr + src_buf_size,
|
||||||
(unsigned int)iova_addr +
|
|
||||||
(unsigned int)src_buf_size,
|
|
||||||
io_cfg[i].offsets[j],
|
io_cfg[i].offsets[j],
|
||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
}
|
}
|
||||||
@@ -11534,44 +11529,25 @@ static int cam_ife_hw_mgr_handle_hw_eof(
|
|||||||
}
|
}
|
||||||
|
|
||||||
static int cam_ife_hw_mgr_check_rdi_scratch_buf_done(
|
static int cam_ife_hw_mgr_check_rdi_scratch_buf_done(
|
||||||
struct cam_ife_hw_mgr_ctx *hw_mgr_ctx, uint32_t res_id,
|
const uint32_t ctx_index, struct cam_sfe_scratch_buf_cfg *scratch_cfg,
|
||||||
uint32_t last_consumed_addr)
|
uint32_t res_id, uint32_t last_consumed_addr)
|
||||||
{
|
{
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
struct cam_sfe_scratch_buf_info *buf_info;
|
struct cam_sfe_scratch_buf_info *buf_info;
|
||||||
|
|
||||||
if (!hw_mgr_ctx->sfe_info.scratch_config->config_done) {
|
if (!scratch_cfg->config_done) {
|
||||||
CAM_DBG(CAM_ISP, "No scratch config for ctx: %u",
|
CAM_DBG(CAM_ISP, "No scratch config for ctx: %u", ctx_index);
|
||||||
hw_mgr_ctx->ctx_index);
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
switch (res_id) {
|
switch (res_id) {
|
||||||
case CAM_ISP_SFE_OUT_RES_RDI_0:
|
case CAM_ISP_SFE_OUT_RES_RDI_0:
|
||||||
buf_info = &hw_mgr_ctx->sfe_info.scratch_config->buf_info[
|
|
||||||
res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
|
|
||||||
if ((uint32_t)buf_info->io_addr ==
|
|
||||||
last_consumed_addr) {
|
|
||||||
CAM_DBG(CAM_ISP, "SFE RDI0 buf done for scratch - skip ctx notify");
|
|
||||||
rc = -EAGAIN;
|
|
||||||
}
|
|
||||||
|
|
||||||
break;
|
|
||||||
case CAM_ISP_SFE_OUT_RES_RDI_1:
|
case CAM_ISP_SFE_OUT_RES_RDI_1:
|
||||||
buf_info = &hw_mgr_ctx->sfe_info.scratch_config->buf_info[
|
|
||||||
res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
|
|
||||||
if ((uint32_t)buf_info->io_addr ==
|
|
||||||
last_consumed_addr) {
|
|
||||||
CAM_DBG(CAM_ISP, "SFE RDI1 buf done for scratch - skip ctx notify");
|
|
||||||
rc = -EAGAIN;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
case CAM_ISP_SFE_OUT_RES_RDI_2:
|
case CAM_ISP_SFE_OUT_RES_RDI_2:
|
||||||
buf_info = &hw_mgr_ctx->sfe_info.scratch_config->buf_info[
|
buf_info = &scratch_cfg->buf_info[res_id - CAM_ISP_SFE_OUT_RES_BASE];
|
||||||
res_id - CAM_ISP_SFE_OUT_RES_RDI_0];
|
if (buf_info->io_addr == last_consumed_addr) {
|
||||||
if ((uint32_t)buf_info->io_addr ==
|
CAM_DBG(CAM_ISP, "SFE RDI%u buf done for scratch - skip ctx notify",
|
||||||
last_consumed_addr) {
|
(res_id - CAM_ISP_SFE_OUT_RES_BASE));
|
||||||
CAM_DBG(CAM_ISP, "SFE RDI2 buf done for scratch - skip ctx notify");
|
|
||||||
rc = -EAGAIN;
|
rc = -EAGAIN;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
@@ -11601,8 +11577,9 @@ static int cam_ife_hw_mgr_handle_hw_buf_done(
|
|||||||
|
|
||||||
if (cam_ife_hw_mgr_is_sfe_rdi_for_fetch(event_info->res_id)) {
|
if (cam_ife_hw_mgr_is_sfe_rdi_for_fetch(event_info->res_id)) {
|
||||||
rc = cam_ife_hw_mgr_check_rdi_scratch_buf_done(
|
rc = cam_ife_hw_mgr_check_rdi_scratch_buf_done(
|
||||||
ife_hw_mgr_ctx, event_info->res_id,
|
ife_hw_mgr_ctx->ctx_index,
|
||||||
event_info->reg_val);
|
ife_hw_mgr_ctx->sfe_info.scratch_config,
|
||||||
|
event_info->res_id, event_info->reg_val);
|
||||||
if (rc)
|
if (rc)
|
||||||
goto end;
|
goto end;
|
||||||
}
|
}
|
||||||
|
@@ -709,7 +709,7 @@ int cam_isp_add_io_buffers(
|
|||||||
uint32_t i, j, num_out_buf, num_in_buf;
|
uint32_t i, j, num_out_buf, num_in_buf;
|
||||||
uint32_t res_id_out, res_id_in, plane_id;
|
uint32_t res_id_out, res_id_in, plane_id;
|
||||||
uint32_t io_cfg_used_bytes, num_ent;
|
uint32_t io_cfg_used_bytes, num_ent;
|
||||||
uint32_t *image_buf_addr;
|
dma_addr_t *image_buf_addr;
|
||||||
uint32_t *image_buf_offset;
|
uint32_t *image_buf_offset;
|
||||||
uint64_t iova_addr;
|
uint64_t iova_addr;
|
||||||
size_t size;
|
size_t size;
|
||||||
@@ -996,10 +996,8 @@ int cam_isp_add_io_buffers(
|
|||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
image_buf_addr =
|
image_buf_addr = out_map_entries->image_buf_addr;
|
||||||
out_map_entries->image_buf_addr;
|
image_buf_offset = wm_update.image_buf_offset;
|
||||||
image_buf_offset =
|
|
||||||
wm_update.image_buf_offset;
|
|
||||||
if (j == CAM_ISP_HW_SPLIT_LEFT) {
|
if (j == CAM_ISP_HW_SPLIT_LEFT) {
|
||||||
for (plane_id = 0;
|
for (plane_id = 0;
|
||||||
plane_id < CAM_PACKET_MAX_PLANES;
|
plane_id < CAM_PACKET_MAX_PLANES;
|
||||||
|
@@ -94,7 +94,7 @@ struct cam_sfe_bus_rd_rm_resource_data {
|
|||||||
uint32_t unpacker_cfg;
|
uint32_t unpacker_cfg;
|
||||||
uint32_t burst_len;
|
uint32_t burst_len;
|
||||||
uint32_t en_cfg;
|
uint32_t en_cfg;
|
||||||
uint32_t img_addr;
|
dma_addr_t img_addr;
|
||||||
uint32_t input_if_cmd;
|
uint32_t input_if_cmd;
|
||||||
bool enable_caching;
|
bool enable_caching;
|
||||||
uint32_t cache_cfg;
|
uint32_t cache_cfg;
|
||||||
@@ -1223,10 +1223,10 @@ static int cam_sfe_bus_rd_config_rm(void *priv, void *cmd_args,
|
|||||||
cam_io_w_mb(update_buf->rm_update->image_buf[i],
|
cam_io_w_mb(update_buf->rm_update->image_buf[i],
|
||||||
rm_data->common_data->mem_base +
|
rm_data->common_data->mem_base +
|
||||||
rm_data->hw_regs->image_addr);
|
rm_data->hw_regs->image_addr);
|
||||||
CAM_DBG(CAM_SFE, "SFE:%d RM:%d image_address:0x%X",
|
CAM_DBG(CAM_SFE, "SFE:%d RM:%d image_address:0x%llx",
|
||||||
rm_data->common_data->core_index,
|
rm_data->common_data->core_index,
|
||||||
rm_data->index,
|
rm_data->index,
|
||||||
update_buf->rm_update->image_buf[i]);
|
(update_buf->rm_update->image_buf[i]));
|
||||||
rm_data->img_addr =
|
rm_data->img_addr =
|
||||||
update_buf->rm_update->image_buf[i];
|
update_buf->rm_update->image_buf[i];
|
||||||
}
|
}
|
||||||
|
@@ -2891,7 +2891,7 @@ static void cam_vfe_bus_ver3_update_ubwc_meta_addr(
|
|||||||
uint32_t *reg_val_pair,
|
uint32_t *reg_val_pair,
|
||||||
uint32_t *j,
|
uint32_t *j,
|
||||||
void *regs,
|
void *regs,
|
||||||
uint64_t image_buf)
|
dma_addr_t image_buf)
|
||||||
{
|
{
|
||||||
struct cam_vfe_bus_ver3_reg_offset_ubwc_client *ubwc_regs;
|
struct cam_vfe_bus_ver3_reg_offset_ubwc_client *ubwc_regs;
|
||||||
|
|
||||||
|
@@ -746,6 +746,7 @@ static void cam_jpeg_mgr_print_io_bufs(struct cam_packet *packet,
|
|||||||
CAM_ERR(CAM_UTIL, "get src buf address fail");
|
CAM_ERR(CAM_UTIL, "get src buf address fail");
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((iova_addr & 0xFFFFFFFF) != iova_addr) {
|
if ((iova_addr & 0xFFFFFFFF) != iova_addr) {
|
||||||
CAM_ERR(CAM_JPEG, "Invalid mapped address");
|
CAM_ERR(CAM_JPEG, "Invalid mapped address");
|
||||||
rc = -EINVAL;
|
rc = -EINVAL;
|
||||||
@@ -753,13 +754,12 @@ static void cam_jpeg_mgr_print_io_bufs(struct cam_packet *packet,
|
|||||||
}
|
}
|
||||||
|
|
||||||
CAM_INFO(CAM_JPEG,
|
CAM_INFO(CAM_JPEG,
|
||||||
"pln %u w %u h %u stride %u slice %u size %d addr 0x%x offset 0x%x memh %x",
|
"pln %u w %u h %u stride %u slice %u size %zx addr 0x%llx offset 0x%x memh %x",
|
||||||
j, io_cfg[i].planes[j].width,
|
j, io_cfg[i].planes[j].width,
|
||||||
io_cfg[i].planes[j].height,
|
io_cfg[i].planes[j].height,
|
||||||
io_cfg[i].planes[j].plane_stride,
|
io_cfg[i].planes[j].plane_stride,
|
||||||
io_cfg[i].planes[j].slice_height,
|
io_cfg[i].planes[j].slice_height,
|
||||||
(int32_t)src_buf_size,
|
src_buf_size, iova_addr,
|
||||||
(unsigned int)iova_addr,
|
|
||||||
io_cfg[i].offsets[j],
|
io_cfg[i].offsets[j],
|
||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
}
|
}
|
||||||
|
@@ -4221,14 +4221,14 @@ iodump:
|
|||||||
rc = -EINVAL;
|
rc = -EINVAL;
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
CAM_INFO(CAM_OPE,
|
CAM_INFO(CAM_OPE,
|
||||||
"pln %u w %u h %u stride %u slice %u size %d addr 0x%x offset 0x%x memh %x",
|
"pln %u w %u h %u stride %u slice %u size %zu addr 0x%llx offset 0x%x memh %x",
|
||||||
j, io_cfg[i].planes[j].width,
|
j, io_cfg[i].planes[j].width,
|
||||||
io_cfg[i].planes[j].height,
|
io_cfg[i].planes[j].height,
|
||||||
io_cfg[i].planes[j].plane_stride,
|
io_cfg[i].planes[j].plane_stride,
|
||||||
io_cfg[i].planes[j].slice_height,
|
io_cfg[i].planes[j].slice_height,
|
||||||
(int32_t)src_buf_size,
|
src_buf_size, iova_addr,
|
||||||
(unsigned int)iova_addr,
|
|
||||||
io_cfg[i].offsets[j],
|
io_cfg[i].offsets[j],
|
||||||
io_cfg[i].mem_handle[j]);
|
io_cfg[i].mem_handle[j]);
|
||||||
|
|
||||||
@@ -4236,7 +4236,7 @@ iodump:
|
|||||||
for (stripe_num = 0; stripe_num < io_buf->num_stripes[j];
|
for (stripe_num = 0; stripe_num < io_buf->num_stripes[j];
|
||||||
stripe_num++) {
|
stripe_num++) {
|
||||||
CAM_INFO(CAM_OPE,
|
CAM_INFO(CAM_OPE,
|
||||||
"pln_num %d stripe_num %d width %d height %d stride %d io vaddr 0x%x",
|
"pln_num %d stripe_num %d width %d height %d stride %d iovaddr 0x%llx",
|
||||||
j, stripe_num, io_buf->s_io[j][stripe_num].width,
|
j, stripe_num, io_buf->s_io[j][stripe_num].width,
|
||||||
io_buf->s_io[j][stripe_num].height,
|
io_buf->s_io[j][stripe_num].height,
|
||||||
io_buf->s_io[j][stripe_num].stride,
|
io_buf->s_io[j][stripe_num].stride,
|
||||||
|
@@ -301,7 +301,7 @@ int cam_mem_get_io_buf(int32_t buf_handle, int32_t mmu_handle,
|
|||||||
}
|
}
|
||||||
|
|
||||||
CAM_DBG(CAM_MEM,
|
CAM_DBG(CAM_MEM,
|
||||||
"handle:0x%x fd:%d iova_ptr:%pK len_ptr:%llu",
|
"handle:0x%x fd:%d iova_ptr:0x%llx len_ptr:%llu",
|
||||||
mmu_handle, tbl.bufq[idx].fd, iova_ptr, *len_ptr);
|
mmu_handle, tbl.bufq[idx].fd, iova_ptr, *len_ptr);
|
||||||
handle_mismatch:
|
handle_mismatch:
|
||||||
mutex_unlock(&tbl.bufq[idx].q_lock);
|
mutex_unlock(&tbl.bufq[idx].q_lock);
|
||||||
@@ -830,53 +830,31 @@ static int cam_mem_util_map_hw_va(uint32_t flags,
|
|||||||
"map_hw_va : fd = %d, flags = 0x%x, dir=%d, num_hdls=%d",
|
"map_hw_va : fd = %d, flags = 0x%x, dir=%d, num_hdls=%d",
|
||||||
fd, flags, dir, num_hdls);
|
fd, flags, dir, num_hdls);
|
||||||
|
|
||||||
if (flags & CAM_MEM_FLAG_PROTECTED_MODE) {
|
|
||||||
for (i = 0; i < num_hdls; i++) {
|
for (i = 0; i < num_hdls; i++) {
|
||||||
rc = cam_smmu_map_stage2_iova(mmu_hdls[i],
|
if (flags & CAM_MEM_FLAG_PROTECTED_MODE)
|
||||||
fd,
|
rc = cam_smmu_map_stage2_iova(mmu_hdls[i], fd, dir, hw_vaddr, len);
|
||||||
dir,
|
else
|
||||||
hw_vaddr,
|
rc = cam_smmu_map_user_iova(mmu_hdls[i], fd, dis_delayed_unmap, dir,
|
||||||
len);
|
hw_vaddr, len, region, is_internal);
|
||||||
|
if (rc) {
|
||||||
if (rc < 0) {
|
|
||||||
CAM_ERR(CAM_MEM,
|
CAM_ERR(CAM_MEM,
|
||||||
"Failed to securely map to smmu, i=%d, fd=%d, dir=%d, mmu_hdl=%d, rc=%d",
|
"Failed %s map to smmu, i=%d, fd=%d, dir=%d, mmu_hdl=%d, rc=%d",
|
||||||
|
(flags & CAM_MEM_FLAG_PROTECTED_MODE) ? "" : "secured",
|
||||||
i, fd, dir, mmu_hdls[i], rc);
|
i, fd, dir, mmu_hdls[i], rc);
|
||||||
goto multi_map_fail;
|
goto multi_map_fail;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
} else {
|
|
||||||
for (i = 0; i < num_hdls; i++) {
|
|
||||||
rc = cam_smmu_map_user_iova(mmu_hdls[i],
|
|
||||||
fd,
|
|
||||||
dis_delayed_unmap,
|
|
||||||
dir,
|
|
||||||
(dma_addr_t *)hw_vaddr,
|
|
||||||
len,
|
|
||||||
region,
|
|
||||||
is_internal);
|
|
||||||
|
|
||||||
if (rc < 0) {
|
|
||||||
CAM_ERR(CAM_MEM,
|
|
||||||
"Failed to map to smmu, i=%d, fd=%d, dir=%d, mmu_hdl=%d, region=%d, rc=%d",
|
|
||||||
i, fd, dir, mmu_hdls[i], region, rc);
|
|
||||||
goto multi_map_fail;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
return rc;
|
return rc;
|
||||||
multi_map_fail:
|
multi_map_fail:
|
||||||
|
for (--i; i>= 0; i--) {
|
||||||
if (flags & CAM_MEM_FLAG_PROTECTED_MODE)
|
if (flags & CAM_MEM_FLAG_PROTECTED_MODE)
|
||||||
for (--i; i >= 0; i--)
|
|
||||||
cam_smmu_unmap_stage2_iova(mmu_hdls[i], fd);
|
cam_smmu_unmap_stage2_iova(mmu_hdls[i], fd);
|
||||||
else
|
else
|
||||||
for (--i; i >= 0; i--)
|
cam_smmu_unmap_user_iova(mmu_hdls[i], fd, CAM_SMMU_REGION_IO);
|
||||||
cam_smmu_unmap_user_iova(mmu_hdls[i],
|
}
|
||||||
fd,
|
|
||||||
CAM_SMMU_REGION_IO);
|
|
||||||
return rc;
|
|
||||||
|
|
||||||
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
int cam_mem_mgr_alloc_and_map(struct cam_mem_mgr_alloc_cmd *cmd)
|
int cam_mem_mgr_alloc_and_map(struct cam_mem_mgr_alloc_cmd *cmd)
|
||||||
|
@@ -55,7 +55,7 @@ struct cam_mem_buf_queue {
|
|||||||
int32_t align;
|
int32_t align;
|
||||||
size_t len;
|
size_t len;
|
||||||
uint32_t flags;
|
uint32_t flags;
|
||||||
uint64_t vaddr;
|
dma_addr_t vaddr;
|
||||||
uintptr_t kmdvaddr;
|
uintptr_t kmdvaddr;
|
||||||
bool active;
|
bool active;
|
||||||
bool is_imported;
|
bool is_imported;
|
||||||
|
@@ -356,15 +356,15 @@ static void cam_smmu_dump_monitor_array(
|
|||||||
hrs = do_div(tmp, 24);
|
hrs = do_div(tmp, 24);
|
||||||
|
|
||||||
CAM_INFO(CAM_SMMU,
|
CAM_INFO(CAM_SMMU,
|
||||||
"**** %llu:%llu:%llu.%llu : Index[%d] [%s] : ion_fd=%d start=0x%x end=0x%x len=%u region=%d",
|
"**** %llu:%llu:%llu.%llu : Index[%d] [%s] : ion_fd=%d start=0x%llx end=0x%llx len=%zu region=%d",
|
||||||
hrs, min, sec, ms,
|
hrs, min, sec, ms,
|
||||||
index,
|
index,
|
||||||
cb_info->monitor_entries[index].is_map ? "MAP" : "UNMAP",
|
cb_info->monitor_entries[index].is_map ? "MAP" : "UNMAP",
|
||||||
cb_info->monitor_entries[index].ion_fd,
|
cb_info->monitor_entries[index].ion_fd,
|
||||||
(void *)cb_info->monitor_entries[index].paddr,
|
cb_info->monitor_entries[index].paddr,
|
||||||
((uint64_t)cb_info->monitor_entries[index].paddr +
|
cb_info->monitor_entries[index].paddr +
|
||||||
(uint64_t)cb_info->monitor_entries[index].len),
|
cb_info->monitor_entries[index].len,
|
||||||
(unsigned int)cb_info->monitor_entries[index].len,
|
cb_info->monitor_entries[index].len,
|
||||||
cb_info->monitor_entries[index].region_id);
|
cb_info->monitor_entries[index].region_id);
|
||||||
|
|
||||||
index = (index + 1) % CAM_SMMU_MONITOR_MAX_ENTRIES;
|
index = (index + 1) % CAM_SMMU_MONITOR_MAX_ENTRIES;
|
||||||
@@ -1333,11 +1333,11 @@ static int cam_smmu_detach_device(int idx)
|
|||||||
}
|
}
|
||||||
|
|
||||||
static int cam_smmu_alloc_iova(size_t size,
|
static int cam_smmu_alloc_iova(size_t size,
|
||||||
int32_t smmu_hdl, uint32_t *iova)
|
int32_t smmu_hdl, unsigned long *iova)
|
||||||
{
|
{
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
int idx;
|
int idx;
|
||||||
uint32_t vaddr = 0;
|
unsigned long vaddr = 0;
|
||||||
|
|
||||||
if (!iova || !size || (smmu_hdl == HANDLE_INIT)) {
|
if (!iova || !size || (smmu_hdl == HANDLE_INIT)) {
|
||||||
CAM_ERR(CAM_SMMU, "Error: Input args are invalid");
|
CAM_ERR(CAM_SMMU, "Error: Input args are invalid");
|
||||||
@@ -1381,7 +1381,7 @@ get_addr_end:
|
|||||||
return rc;
|
return rc;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int cam_smmu_free_iova(uint32_t addr, size_t size,
|
static int cam_smmu_free_iova(unsigned long iova, size_t size,
|
||||||
int32_t smmu_hdl)
|
int32_t smmu_hdl)
|
||||||
{
|
{
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
@@ -1408,7 +1408,7 @@ static int cam_smmu_free_iova(uint32_t addr, size_t size,
|
|||||||
goto get_addr_end;
|
goto get_addr_end;
|
||||||
}
|
}
|
||||||
|
|
||||||
gen_pool_free(iommu_cb_set.cb_info[idx].shared_mem_pool, addr, size);
|
gen_pool_free(iommu_cb_set.cb_info[idx].shared_mem_pool, iova, size);
|
||||||
|
|
||||||
get_addr_end:
|
get_addr_end:
|
||||||
return rc;
|
return rc;
|
||||||
@@ -2064,7 +2064,7 @@ static int cam_smmu_map_buffer_validate(struct dma_buf *buf,
|
|||||||
struct sg_table *table = NULL;
|
struct sg_table *table = NULL;
|
||||||
struct iommu_domain *domain;
|
struct iommu_domain *domain;
|
||||||
size_t size = 0;
|
size_t size = 0;
|
||||||
uint32_t iova = 0;
|
unsigned long iova = 0;
|
||||||
int rc = 0;
|
int rc = 0;
|
||||||
struct timespec64 ts1, ts2;
|
struct timespec64 ts1, ts2;
|
||||||
long microsec = 0;
|
long microsec = 0;
|
||||||
@@ -2107,9 +2107,7 @@ static int cam_smmu_map_buffer_validate(struct dma_buf *buf,
|
|||||||
goto err_unmap_sg;
|
goto err_unmap_sg;
|
||||||
}
|
}
|
||||||
|
|
||||||
rc = cam_smmu_alloc_iova(*len_ptr,
|
rc = cam_smmu_alloc_iova(*len_ptr, iommu_cb_set.cb_info[idx].handle, &iova);
|
||||||
iommu_cb_set.cb_info[idx].handle,
|
|
||||||
&iova);
|
|
||||||
|
|
||||||
if (rc < 0) {
|
if (rc < 0) {
|
||||||
CAM_ERR(CAM_SMMU,
|
CAM_ERR(CAM_SMMU,
|
||||||
@@ -2165,9 +2163,8 @@ static int cam_smmu_map_buffer_validate(struct dma_buf *buf,
|
|||||||
}
|
}
|
||||||
|
|
||||||
CAM_DBG(CAM_SMMU,
|
CAM_DBG(CAM_SMMU,
|
||||||
"iova=%pK, region_id=%d, paddr=0x%x, len=%d, dma_map_attrs=%d",
|
"iova=%pK, region_id=%d, paddr=0x%llx, len=%zu, dma_map_attrs=%d",
|
||||||
iova, region_id, (uint64_t)*paddr_ptr, *len_ptr,
|
iova, region_id, *paddr_ptr, *len_ptr, attach->dma_map_attrs);
|
||||||
attach->dma_map_attrs);
|
|
||||||
|
|
||||||
if (iommu_cb_set.map_profile_enable) {
|
if (iommu_cb_set.map_profile_enable) {
|
||||||
CAM_GET_TIMESTAMP(ts2);
|
CAM_GET_TIMESTAMP(ts2);
|
||||||
@@ -2215,9 +2212,8 @@ static int cam_smmu_map_buffer_validate(struct dma_buf *buf,
|
|||||||
goto err_alloc;
|
goto err_alloc;
|
||||||
}
|
}
|
||||||
|
|
||||||
CAM_DBG(CAM_SMMU, "idx=%d, dma_buf=%pK, dev=%pK, paddr=0x%x, len=%u",
|
CAM_DBG(CAM_SMMU, "idx=%d, dma_buf=%pK, dev=%pOFfp, paddr=0x%llx, len=%zu",
|
||||||
idx, buf, (void *)iommu_cb_set.cb_info[idx].dev,
|
idx, buf, iommu_cb_set.cb_info[idx].dev, *paddr_ptr, *len_ptr);
|
||||||
(void *)*paddr_ptr, (unsigned int)*len_ptr);
|
|
||||||
|
|
||||||
/* Unmap the mapping in dma region as this is not used anyway */
|
/* Unmap the mapping in dma region as this is not used anyway */
|
||||||
if (region_id == CAM_SMMU_REGION_SHARED)
|
if (region_id == CAM_SMMU_REGION_SHARED)
|
||||||
@@ -2334,7 +2330,7 @@ static int cam_smmu_unmap_buf_and_remove_from_list(
|
|||||||
mapping_info);
|
mapping_info);
|
||||||
|
|
||||||
CAM_DBG(CAM_SMMU,
|
CAM_DBG(CAM_SMMU,
|
||||||
"region_id=%d, paddr=0x%x, len=%d, dma_map_attrs=%d",
|
"region_id=%d, paddr=0x%llx, len=%d, dma_map_attrs=%d",
|
||||||
mapping_info->region_id, mapping_info->paddr, mapping_info->len,
|
mapping_info->region_id, mapping_info->paddr, mapping_info->len,
|
||||||
mapping_info->attach->dma_map_attrs);
|
mapping_info->attach->dma_map_attrs);
|
||||||
|
|
||||||
@@ -2343,8 +2339,8 @@ static int cam_smmu_unmap_buf_and_remove_from_list(
|
|||||||
|
|
||||||
if (mapping_info->region_id == CAM_SMMU_REGION_SHARED) {
|
if (mapping_info->region_id == CAM_SMMU_REGION_SHARED) {
|
||||||
CAM_DBG(CAM_SMMU,
|
CAM_DBG(CAM_SMMU,
|
||||||
"Removing SHARED buffer paddr = %pK, len = %zu",
|
"Removing SHARED buffer paddr = 0x%llx, len = %zu",
|
||||||
(void *)mapping_info->paddr, mapping_info->len);
|
mapping_info->paddr, mapping_info->len);
|
||||||
|
|
||||||
domain = iommu_cb_set.cb_info[idx].domain;
|
domain = iommu_cb_set.cb_info[idx].domain;
|
||||||
|
|
||||||
@@ -2943,10 +2939,8 @@ static int cam_smmu_map_stage2_buffer_and_add_to_list(int idx, int ion_fd,
|
|||||||
mapping_info->ref_count = 1;
|
mapping_info->ref_count = 1;
|
||||||
mapping_info->buf = dmabuf;
|
mapping_info->buf = dmabuf;
|
||||||
|
|
||||||
CAM_DBG(CAM_SMMU, "idx=%d, ion_fd=%d, dev=%pK, paddr=%pK, len=%u",
|
CAM_DBG(CAM_SMMU, "idx=%d, ion_fd=%d, dev=%pOFfp, paddr=0x%llx, len=%zu",
|
||||||
idx, ion_fd,
|
idx, ion_fd, iommu_cb_set.cb_info[idx].dev, *paddr_ptr, *len_ptr);
|
||||||
(void *)iommu_cb_set.cb_info[idx].dev,
|
|
||||||
(void *)*paddr_ptr, (unsigned int)*len_ptr);
|
|
||||||
|
|
||||||
/* add to the list */
|
/* add to the list */
|
||||||
list_add(&mapping_info->list, &iommu_cb_set.cb_info[idx].smmu_buf_list);
|
list_add(&mapping_info->list, &iommu_cb_set.cb_info[idx].smmu_buf_list);
|
||||||
|
@@ -1,6 +1,6 @@
|
|||||||
// SPDX-License-Identifier: GPL-2.0-only
|
// SPDX-License-Identifier: GPL-2.0-only
|
||||||
/*
|
/*
|
||||||
* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
|
* Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/types.h>
|
#include <linux/types.h>
|
||||||
@@ -281,9 +281,8 @@ int cam_packet_util_process_patches(struct cam_packet *packet,
|
|||||||
struct cam_patch_desc *patch_desc = NULL;
|
struct cam_patch_desc *patch_desc = NULL;
|
||||||
dma_addr_t iova_addr;
|
dma_addr_t iova_addr;
|
||||||
uintptr_t cpu_addr = 0;
|
uintptr_t cpu_addr = 0;
|
||||||
uint32_t temp;
|
dma_addr_t temp;
|
||||||
uint32_t *dst_cpu_addr;
|
uint32_t *dst_cpu_addr;
|
||||||
uint32_t *src_buf_iova_addr;
|
|
||||||
size_t dst_buf_len;
|
size_t dst_buf_len;
|
||||||
size_t src_buf_size;
|
size_t src_buf_size;
|
||||||
int i = 0;
|
int i = 0;
|
||||||
@@ -323,7 +322,6 @@ int cam_packet_util_process_patches(struct cam_packet *packet,
|
|||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
src_buf_iova_addr = (uint32_t *)iova_addr;
|
|
||||||
temp = iova_addr;
|
temp = iova_addr;
|
||||||
|
|
||||||
rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
|
rc = cam_mem_get_cpu_buf(patch_desc[i].dst_buf_hdl,
|
||||||
@@ -353,9 +351,8 @@ int cam_packet_util_process_patches(struct cam_packet *packet,
|
|||||||
*dst_cpu_addr = temp;
|
*dst_cpu_addr = temp;
|
||||||
|
|
||||||
CAM_DBG(CAM_UTIL,
|
CAM_DBG(CAM_UTIL,
|
||||||
"patch is done for dst %pK with src %pK value %llx",
|
"patch is done for dst %pk with src 0x%llx value 0x%llx",
|
||||||
dst_cpu_addr, src_buf_iova_addr,
|
dst_cpu_addr, iova_addr, *((uint64_t *)dst_cpu_addr));
|
||||||
*((uint64_t *)dst_cpu_addr));
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return rc;
|
return rc;
|
||||||
|
Reference in New Issue
Block a user