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@@ -2572,7 +2572,8 @@ int cam_tfe_init_hw(void *hw_priv, void *init_hw_args, uint32_t arg_size)
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struct cam_tfe_hw_core_info *core_info = NULL;
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struct cam_tfe_top_priv *top_priv;
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void __iomem *mem_base;
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- int rc = 0;
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+ int i, rc = 0;
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+ unsigned long max_clk_rate = 0;
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uint32_t reset_core_args =
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CAM_TFE_HW_RESET_HW_AND_REG;
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@@ -2595,9 +2596,14 @@ int cam_tfe_init_hw(void *hw_priv, void *init_hw_args, uint32_t arg_size)
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return 0;
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}
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mutex_unlock(&tfe_hw->hw_mutex);
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+ /* read clock value based on clock blob received */
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+ for (i = 0; i < CAM_TFE_TOP_IN_PORT_MAX; i++) {
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+ if (top_priv->req_clk_rate[i] > max_clk_rate)
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+ max_clk_rate = top_priv->req_clk_rate[i];
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+ }
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/* Turn ON Regulators, Clocks and other SOC resources */
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- rc = cam_tfe_enable_soc_resources(soc_info);
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+ rc = cam_tfe_enable_soc_resources(soc_info, max_clk_rate);
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if (rc) {
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CAM_ERR(CAM_ISP, "Enable SOC failed");
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rc = -EFAULT;
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@@ -2616,7 +2622,7 @@ int cam_tfe_init_hw(void *hw_priv, void *init_hw_args, uint32_t arg_size)
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goto disable_soc;
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}
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- top_priv->hw_clk_rate = 0;
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+ top_priv->hw_clk_rate = max_clk_rate;
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core_info->irq_err_config_cnt = 0;
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core_info->irq_err_config = false;
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rc = core_info->tfe_bus->hw_ops.init(core_info->tfe_bus->bus_priv,
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