msm: camera: uapi: Support for UAPI_HEADER_TEST config
Aligns the uapi header types and includes to be in-line with upstream kernel formatting. The errors are given by enabling the UAPI_HEADER_TEST config, which is now enabled in GKI builds. CRs-Fixed: 2679250 Change-Id: I195fb2aab9251043fc63d79dd31f2db53b1228f5 Signed-off-by: Karthik Jayakumar <kjayakum@codeaurora.org>
This commit is contained in:
Karthik Jayakumar
@@ -6,10 +6,10 @@
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#ifndef __UAPI_CAM_ISP_H__
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#define __UAPI_CAM_ISP_H__
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#include <media/cam_defs.h>
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#include <media/cam_isp_vfe.h>
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#include <media/cam_isp_ife.h>
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#include <media/cam_cpas.h>
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#include <camera/media/cam_defs.h>
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#include <camera/media/cam_isp_vfe.h>
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#include <camera/media/cam_isp_ife.h>
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#include <camera/media/cam_cpas.h>
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/* ISP driver name */
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#define CAM_ISP_DEV_NAME "cam-isp"
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@@ -145,8 +145,8 @@
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*
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*/
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struct cam_isp_dev_cap_info {
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uint32_t hw_type;
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uint32_t reserved;
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__u32 hw_type;
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__u32 reserved;
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struct cam_hw_version hw_version;
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};
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@@ -161,11 +161,11 @@ struct cam_isp_dev_cap_info {
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*
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*/
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struct cam_isp_query_cap_cmd {
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struct cam_iommu_handle device_iommu;
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struct cam_iommu_handle cdm_iommu;
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int32_t num_dev;
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uint32_t reserved;
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struct cam_isp_dev_cap_info dev_caps[CAM_ISP_HW_MAX];
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struct cam_iommu_handle device_iommu;
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struct cam_iommu_handle cdm_iommu;
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__s32 num_dev;
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__u32 reserved;
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struct cam_isp_dev_cap_info dev_caps[CAM_ISP_HW_MAX];
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};
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/* Acquire Device */
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@@ -185,14 +185,14 @@ struct cam_isp_query_cap_cmd {
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*
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*/
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struct cam_isp_out_port_info {
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uint32_t res_type;
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uint32_t format;
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uint32_t width;
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uint32_t height;
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uint32_t comp_grp_id;
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uint32_t split_point;
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uint32_t secure_mode;
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uint32_t reserved;
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__u32 res_type;
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__u32 format;
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__u32 width;
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__u32 height;
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__u32 comp_grp_id;
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__u32 split_point;
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__u32 secure_mode;
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__u32 reserved;
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};
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/**
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@@ -213,16 +213,16 @@ struct cam_isp_out_port_info {
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*
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*/
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struct cam_isp_out_port_info_v2 {
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uint32_t res_type;
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uint32_t format;
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uint32_t width;
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uint32_t height;
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uint32_t comp_grp_id;
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uint32_t split_point;
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uint32_t secure_mode;
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uint32_t wm_mode;
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uint32_t out_port_res1;
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uint32_t out_port_res2;
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__u32 res_type;
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__u32 format;
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__u32 width;
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__u32 height;
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__u32 comp_grp_id;
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__u32 split_point;
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__u32 secure_mode;
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__u32 wm_mode;
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__u32 out_port_res1;
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__u32 out_port_res2;
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};
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/**
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@@ -260,31 +260,31 @@ struct cam_isp_out_port_info_v2 {
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*
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*/
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struct cam_isp_in_port_info {
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uint32_t res_type;
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uint32_t lane_type;
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uint32_t lane_num;
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uint32_t lane_cfg;
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uint32_t vc;
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uint32_t dt;
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uint32_t format;
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uint32_t test_pattern;
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uint32_t usage_type;
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uint32_t left_start;
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uint32_t left_stop;
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uint32_t left_width;
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uint32_t right_start;
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uint32_t right_stop;
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uint32_t right_width;
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uint32_t line_start;
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uint32_t line_stop;
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uint32_t height;
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uint32_t pixel_clk;
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uint32_t batch_size;
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uint32_t dsp_mode;
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uint32_t hbi_cnt;
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uint32_t reserved;
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uint32_t num_out_res;
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struct cam_isp_out_port_info data[1];
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__u32 res_type;
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__u32 lane_type;
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__u32 lane_num;
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__u32 lane_cfg;
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__u32 vc;
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__u32 dt;
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__u32 format;
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__u32 test_pattern;
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__u32 usage_type;
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__u32 left_start;
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__u32 left_stop;
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__u32 left_width;
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__u32 right_start;
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__u32 right_stop;
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__u32 right_width;
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__u32 line_start;
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__u32 line_stop;
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__u32 height;
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__u32 pixel_clk;
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__u32 batch_size;
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__u32 dsp_mode;
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__u32 hbi_cnt;
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__u32 reserved;
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__u32 num_out_res;
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struct cam_isp_out_port_info data[1];
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};
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/**
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@@ -329,38 +329,38 @@ struct cam_isp_in_port_info {
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*
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*/
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struct cam_isp_in_port_info_v2 {
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uint32_t res_type;
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uint32_t lane_type;
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uint32_t lane_num;
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uint32_t lane_cfg;
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uint32_t vc[CAM_ISP_VC_DT_CFG];
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uint32_t dt[CAM_ISP_VC_DT_CFG];
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uint32_t num_valid_vc_dt;
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uint32_t format;
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uint32_t test_pattern;
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uint32_t usage_type;
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uint32_t left_start;
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uint32_t left_stop;
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uint32_t left_width;
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uint32_t right_start;
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uint32_t right_stop;
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uint32_t right_width;
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uint32_t line_start;
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uint32_t line_stop;
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uint32_t height;
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uint32_t pixel_clk;
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uint32_t batch_size;
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uint32_t dsp_mode;
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uint32_t hbi_cnt;
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uint32_t cust_node;
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uint32_t num_out_res;
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uint32_t offline_mode;
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uint32_t horizontal_bin;
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uint32_t qcfa_bin;
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uint32_t csid_res_1;
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uint32_t csid_res_2;
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uint32_t ife_res_1;
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uint32_t ife_res_2;
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__u32 res_type;
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__u32 lane_type;
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__u32 lane_num;
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__u32 lane_cfg;
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__u32 vc[CAM_ISP_VC_DT_CFG];
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__u32 dt[CAM_ISP_VC_DT_CFG];
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__u32 num_valid_vc_dt;
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__u32 format;
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__u32 test_pattern;
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__u32 usage_type;
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__u32 left_start;
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__u32 left_stop;
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__u32 left_width;
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__u32 right_start;
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__u32 right_stop;
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__u32 right_width;
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__u32 line_start;
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__u32 line_stop;
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__u32 height;
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__u32 pixel_clk;
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__u32 batch_size;
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__u32 dsp_mode;
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__u32 hbi_cnt;
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__u32 cust_node;
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__u32 num_out_res;
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__u32 offline_mode;
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__u32 horizontal_bin;
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__u32 qcfa_bin;
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__u32 csid_res_1;
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__u32 csid_res_2;
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__u32 ife_res_1;
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__u32 ife_res_2;
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struct cam_isp_out_port_info_v2 data[1];
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};
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@@ -376,11 +376,11 @@ struct cam_isp_in_port_info_v2 {
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*
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*/
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struct cam_isp_resource {
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uint32_t resource_id;
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uint32_t length;
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uint32_t handle_type;
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uint32_t reserved;
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uint64_t res_hdl;
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__u32 resource_id;
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__u32 length;
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__u32 handle_type;
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__u32 reserved;
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__u64 res_hdl;
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};
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/**
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@@ -398,12 +398,12 @@ struct cam_isp_resource {
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* @reserved: Reserved for alignment
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*/
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struct cam_isp_port_hfr_config {
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uint32_t resource_type;
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uint32_t subsample_pattern;
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uint32_t subsample_period;
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uint32_t framedrop_pattern;
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uint32_t framedrop_period;
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uint32_t reserved;
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__u32 resource_type;
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__u32 subsample_pattern;
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__u32 subsample_period;
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__u32 framedrop_pattern;
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__u32 framedrop_period;
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__u32 reserved;
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} __attribute__((packed));
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/**
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@@ -414,8 +414,8 @@ struct cam_isp_port_hfr_config {
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* @port_hfr_config: HFR configuration for each IO port
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*/
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struct cam_isp_resource_hfr_config {
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uint32_t num_ports;
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uint32_t reserved;
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__u32 num_ports;
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__u32 reserved;
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struct cam_isp_port_hfr_config port_hfr_config[1];
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} __attribute__((packed));
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@@ -433,10 +433,10 @@ struct cam_isp_resource_hfr_config {
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*
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*/
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struct cam_isp_dual_split_params {
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uint32_t split_point;
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uint32_t right_padding;
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uint32_t left_padding;
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uint32_t reserved;
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__u32 split_point;
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__u32 right_padding;
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__u32 left_padding;
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__u32 reserved;
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};
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/**
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@@ -453,10 +453,10 @@ struct cam_isp_dual_split_params {
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*
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*/
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struct cam_isp_dual_stripe_config {
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uint32_t offset;
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uint32_t width;
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uint32_t tileconfig;
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uint32_t port_id;
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__u32 offset;
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__u32 width;
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__u32 tileconfig;
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__u32 port_id;
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};
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/**
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@@ -469,10 +469,10 @@ struct cam_isp_dual_stripe_config {
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*
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*/
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struct cam_isp_dual_config {
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uint32_t num_ports;
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uint32_t reserved;
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struct cam_isp_dual_split_params split_params;
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struct cam_isp_dual_stripe_config stripes[1];
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__u32 num_ports;
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__u32 reserved;
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struct cam_isp_dual_split_params split_params;
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struct cam_isp_dual_stripe_config stripes[1];
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} __attribute__((packed));
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/**
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@@ -488,11 +488,11 @@ struct cam_isp_dual_config {
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* Hence pass the clock and let KMD decide.
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*/
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struct cam_isp_clock_config {
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uint32_t usage_type;
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uint32_t num_rdi;
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uint64_t left_pix_hz;
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uint64_t right_pix_hz;
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uint64_t rdi_hz[1];
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__u32 usage_type;
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__u32 num_rdi;
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__u64 left_pix_hz;
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__u64 right_pix_hz;
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__u64 rdi_hz[1];
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} __attribute__((packed));
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/**
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@@ -501,7 +501,7 @@ struct cam_isp_clock_config {
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* @csid_clock CSID clock
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*/
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struct cam_isp_csid_clock_config {
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uint64_t csid_clock;
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__u64 csid_clock;
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} __attribute__((packed));
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/**
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@@ -510,7 +510,7 @@ struct cam_isp_csid_clock_config {
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* @csid_binning CSID binning
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*/
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struct cam_isp_csid_qcfa_config {
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uint32_t csid_binning;
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__u32 csid_binning;
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} __attribute__((packed));
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/**
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@@ -522,10 +522,10 @@ struct cam_isp_csid_qcfa_config {
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* @ext_bw_bps: Bandwidth vote for path-to-DDR after CAMNOC
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*/
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struct cam_isp_bw_vote {
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uint32_t resource_id;
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uint32_t reserved;
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uint64_t cam_bw_bps;
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uint64_t ext_bw_bps;
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__u32 resource_id;
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__u32 reserved;
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__u64 cam_bw_bps;
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__u64 ext_bw_bps;
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} __attribute__((packed));
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/**
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@@ -538,11 +538,11 @@ struct cam_isp_bw_vote {
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* @rdi_vote: RDI bandwidth requirements
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*/
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struct cam_isp_bw_config {
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uint32_t usage_type;
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uint32_t num_rdi;
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struct cam_isp_bw_vote left_pix_vote;
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struct cam_isp_bw_vote right_pix_vote;
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struct cam_isp_bw_vote rdi_vote[1];
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__u32 usage_type;
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__u32 num_rdi;
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struct cam_isp_bw_vote left_pix_vote;
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struct cam_isp_bw_vote right_pix_vote;
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struct cam_isp_bw_vote rdi_vote[1];
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} __attribute__((packed));
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/**
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@@ -553,9 +553,9 @@ struct cam_isp_bw_config {
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* @axi_path Per path vote info
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*/
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struct cam_isp_bw_config_v2 {
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uint32_t usage_type;
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uint32_t num_paths;
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struct cam_axi_per_path_bw_vote axi_path[1];
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__u32 usage_type;
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__u32 num_paths;
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struct cam_axi_per_path_bw_vote axi_path[1];
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} __attribute__((packed));
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/**
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@@ -580,21 +580,21 @@ struct cam_isp_bw_config_v2 {
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* @latency_buf_size: latency buffer for read engine
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*/
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struct cam_fe_config {
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uint64_t version;
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uint32_t min_vbi;
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uint32_t fs_mode;
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uint32_t fs_line_sync_en;
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uint32_t hbi_count;
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uint32_t fs_sync_enable;
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uint32_t go_cmd_sel;
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uint32_t client_enable;
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uint32_t source_addr;
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uint32_t width;
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uint32_t height;
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uint32_t stride;
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uint32_t format;
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uint32_t unpacker_cfg;
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uint32_t latency_buf_size;
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__u64 version;
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__u32 min_vbi;
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__u32 fs_mode;
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__u32 fs_line_sync_en;
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__u32 hbi_count;
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__u32 fs_sync_enable;
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__u32 go_cmd_sel;
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__u32 client_enable;
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__u32 source_addr;
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__u32 width;
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__u32 height;
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__u32 stride;
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__u32 format;
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__u32 unpacker_cfg;
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__u32 latency_buf_size;
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} __attribute__((packed));
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/**
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@@ -614,18 +614,18 @@ struct cam_fe_config {
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* @reserved: Reserved
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*/
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struct cam_isp_core_config {
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uint32_t version;
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uint32_t vid_ds16_r2pd;
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uint32_t vid_ds4_r2pd;
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uint32_t disp_ds16_r2pd;
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uint32_t disp_ds4_r2pd;
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uint32_t dsp_streaming_tap_point;
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uint32_t ihist_src_sel;
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uint32_t hdr_be_src_sel;
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uint32_t hdr_bhist_src_sel;
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uint32_t input_mux_sel_pdaf;
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uint32_t input_mux_sel_pp;
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uint32_t reserved;
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__u32 version;
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__u32 vid_ds16_r2pd;
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__u32 vid_ds4_r2pd;
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__u32 disp_ds16_r2pd;
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__u32 disp_ds4_r2pd;
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__u32 dsp_streaming_tap_point;
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__u32 ihist_src_sel;
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__u32 hdr_be_src_sel;
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__u32 hdr_bhist_src_sel;
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__u32 input_mux_sel_pdaf;
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__u32 input_mux_sel_pp;
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__u32 reserved;
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} __attribute__((packed));
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/**
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@@ -641,14 +641,14 @@ struct cam_isp_core_config {
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* @data : Start of data region
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*/
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struct cam_isp_acquire_hw_info {
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uint16_t common_info_version;
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uint16_t common_info_size;
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uint32_t common_info_offset;
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uint32_t num_inputs;
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uint32_t input_info_version;
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uint32_t input_info_size;
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uint32_t input_info_offset;
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uint64_t data;
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__u16 common_info_version;
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||||
__u16 common_info_size;
|
||||
__u32 common_info_offset;
|
||||
__u32 num_inputs;
|
||||
__u32 input_info_version;
|
||||
__u32 input_info_size;
|
||||
__u32 input_info_offset;
|
||||
__u64 data;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -673,18 +673,18 @@ struct cam_isp_acquire_hw_info {
|
||||
* @reserved_4 : Reserved field for Write master config
|
||||
*/
|
||||
struct cam_isp_vfe_wm_config {
|
||||
uint32_t port_type;
|
||||
uint32_t wm_mode;
|
||||
uint32_t h_init;
|
||||
uint32_t height;
|
||||
uint32_t width;
|
||||
uint32_t virtual_frame_en;
|
||||
uint32_t stride;
|
||||
uint32_t offset;
|
||||
uint32_t reserved_1;
|
||||
uint32_t reserved_2;
|
||||
uint32_t reserved_3;
|
||||
uint32_t reserved_4;
|
||||
__u32 port_type;
|
||||
__u32 wm_mode;
|
||||
__u32 h_init;
|
||||
__u32 height;
|
||||
__u32 width;
|
||||
__u32 virtual_frame_en;
|
||||
__u32 stride;
|
||||
__u32 offset;
|
||||
__u32 reserved_1;
|
||||
__u32 reserved_2;
|
||||
__u32 reserved_3;
|
||||
__u32 reserved_4;
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -695,9 +695,9 @@ struct cam_isp_vfe_wm_config {
|
||||
* @wm_config : VFE out config
|
||||
*/
|
||||
struct cam_isp_vfe_out_config {
|
||||
uint32_t num_ports;
|
||||
uint32_t reserved;
|
||||
struct cam_isp_vfe_wm_config wm_config[1];
|
||||
__u32 num_ports;
|
||||
__u32 reserved;
|
||||
struct cam_isp_vfe_wm_config wm_config[1];
|
||||
};
|
||||
|
||||
/**
|
||||
@@ -706,7 +706,7 @@ struct cam_isp_vfe_out_config {
|
||||
* @is_epd_sensor : flag to check if epd supported
|
||||
*/
|
||||
struct cam_isp_csid_epd_config {
|
||||
uint32_t is_epd_supported;
|
||||
__u32 is_epd_supported;
|
||||
};
|
||||
|
||||
#define CAM_ISP_ACQUIRE_COMMON_VER0 0x1000
|
||||
|
||||
Reference in New Issue
Block a user