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disp: msm: sde: add multi-mode RFI support

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Currently, RFI feature only supports panel that contains
a single timing node. This limits the feature availability
for panel with multiple modes or with DFPS support.

This change adds support for RFI on panels that contains
multiple timing nodes.

Change-Id: I3a7aadf7b6da3518350b2eb815602b13b5c259f5
Signed-off-by: Amine Najahi <anajahi@codeaurora.org>
This commit is contained in:
Amine Najahi
2021-02-16 16:53:04 -05:00
committed by Gerrit - the friendly Code Review server
parent d4def5bd8c
commit c5f2bd7401
7 changed files with 102 additions and 75 deletions
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12
msm/dsi/dsi_defs.h
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@@ -587,6 +587,16 @@ struct dsi_host_config {
struct dsi_lane_map lane_map;
};
/**
* struct dyn_clk_list - list of dynamic clock rates.
* @rates: list of supported clock rates
* @count: number of supported clock rates
*/
struct dyn_clk_list {
u32 *rates;
u32 count;
};
/**
* struct dsi_display_mode_priv_info - private mode info that will be attached
* with each drm mode
@@ -600,6 +610,7 @@ struct dsi_host_config {
* @dsi_transfer_time_us: Specifies the dsi transfer time for cmd panels.
* @clk_rate_hz: DSI bit clock per lane in hz.
* @min_dsi_clk_hz: Min dsi clk per lane to transfer frame in vsync time.
* @bit_clk_list: List of dynamic bit clock rates supported.
* @topology: Topology selected for the panel
* @dsc: DSC compression info
* @vdc: VDC compression info
@@ -623,6 +634,7 @@ struct dsi_display_mode_priv_info {
u32 dsi_transfer_time_us;
u64 clk_rate_hz;
u64 min_dsi_clk_hz;
struct dyn_clk_list bit_clk_list;
struct msm_display_topology topology;
struct msm_display_dsc_info dsc;