From c5d589a044ddfc9075367767d5ef115fea79a5ee Mon Sep 17 00:00:00 2001 From: Akshata Sahukar Date: Fri, 22 Jul 2022 13:59:52 -0700 Subject: [PATCH] Revert "video: driver: 5 percent increase for vsp and vpp cycles" This reverts commit 4fa2fc8142ee7aa9da4bf2da7bb6ab52d634ab17. Change-Id: Iaa0156c0442fdbf928ba03aa2b833340601ff395 Signed-off-by: Akshata Sahukar --- .../variant/iris3/src/msm_vidc_power_iris3.c | 19 ------------------- 1 file changed, 19 deletions(-) diff --git a/driver/variant/iris3/src/msm_vidc_power_iris3.c b/driver/variant/iris3/src/msm_vidc_power_iris3.c index 3538fcdf93..39626c8321 100644 --- a/driver/variant/iris3/src/msm_vidc_power_iris3.c +++ b/driver/variant/iris3/src/msm_vidc_power_iris3.c @@ -83,16 +83,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) if (inst->capabilities->cap[REQUEST_PREPROCESS].value) vpp_cycles = vpp_cycles + vpp_cycles / 2; - if (res_is_greater_than(inst->crop.width, inst->crop.height, - 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { - /* - * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. - * Hence, increase core clock little bit(5%) to move to the next - * corner i.e., 366MHz. - */ - vpp_cycles = div_u64(vpp_cycles * 21, 20); - } - /* VSP */ /* bitrate is based on fps, scale it using operating rate */ operating_rate = inst->capabilities->cap[OPERATING_RATE].value >> 16; @@ -123,15 +113,6 @@ u64 msm_vidc_calc_freq_iris3(struct msm_vidc_inst *inst, u32 data_size) vsp_cycles += mbs_per_second * base_cycles; - if (res_is_greater_than(inst->crop.width, inst->crop.height, - 4096 + (4096 >> 1), 2176 + (2176 >> 1))) { - /* - * 8k@30 fps encode has a very low margin for sw/fw at 338MHz. - * Hence, increase core clock little bit(5%) to move to the next - * corner i.e., 366MHz. - */ - vsp_cycles = div_u64(vsp_cycles * 21, 20); - } } else if (inst->domain == MSM_VIDC_DECODER) { /* VPP */ vpp_cycles = mbs_per_second * inst->capabilities->cap[MB_CYCLES_VPP].value /