Camera: Bring over TFE specific changes

Following gerrits combined:

msm: camera: tfe: update debug data for overflow
msm: camera: isp: Handling IRQ delay from CDM in tfe
msm: camera: isp: Handling excessive logging in cdm callback
msm: camera: tfe: Fix compilation issue
msm: camera: uapi: Add new HW ports definition for TFE
msm: camera: tfe: Add LDAR dump utility in TFE.

CRs-Fixed: 3623803
Change-Id: I31e7b8d7cff654fd292ce431b790e0e287d6845e
Signed-off-by: Pranav Sanwal <quic_psanwal@quicinc.com>
This commit is contained in:
Pranav Sanwal
2023-09-21 03:20:51 +05:30
committed by Sridhar Gujje
parent 050d6d7a8a
commit c565be83b1
4 changed files with 82 additions and 19 deletions

View File

@@ -1716,27 +1716,32 @@ void cam_tfe_cam_cdm_callback(uint32_t handle, void *userdata,
return; return;
} }
ctx = (struct cam_tfe_hw_mgr_ctx *)userdata;
hw_update_data = ctx->cdm_userdata.hw_update_data;
if (status == CAM_CDM_CB_STATUS_BL_SUCCESS) { if (status == CAM_CDM_CB_STATUS_BL_SUCCESS) {
hw_update_data =
(struct cam_isp_prepare_hw_update_data *)userdata;
ctx =
(struct cam_tfe_hw_mgr_ctx *)hw_update_data->isp_mgr_ctx;
complete_all(&ctx->config_done_complete); complete_all(&ctx->config_done_complete);
atomic_set(&ctx->cdm_done, 1); atomic_set(&ctx->cdm_done, 1);
ctx->last_cdm_done_req = *(uint64_t *)cookie; ctx->last_cdm_done_req = *(uint64_t *)cookie;
if (g_tfe_hw_mgr.debug_cfg.per_req_reg_dump) if (g_tfe_hw_mgr.debug_cfg.per_req_reg_dump) {
cam_tfe_mgr_handle_reg_dump(ctx, if (ctx->cdm_userdata.request_id == *(uint64_t *)cookie) {
hw_update_data->reg_dump_buf_desc, cam_tfe_mgr_handle_reg_dump(ctx,
hw_update_data->num_reg_dump_buf, hw_update_data->reg_dump_buf_desc,
CAM_ISP_TFE_PACKET_META_REG_DUMP_PER_REQUEST, hw_update_data->num_reg_dump_buf,
NULL, false); CAM_ISP_TFE_PACKET_META_REG_DUMP_PER_REQUEST,
NULL, false);
} else {
CAM_INFO(CAM_ISP, "CDM delay, Skip dump req: %llu, cdm_req: %llu",
*(uint64_t *)cookie, ctx->cdm_userdata.request_id);
}
}
CAM_DBG(CAM_ISP, CAM_DBG(CAM_ISP,
"Called by CDM hdl=%x, udata=%pK, status=%d, cookie=%llu ctx_index=%d", "CDM hdl=%x, udata=%pK, status=%d, cookie=%llu ctx_index=%d cdm_req=%llu",
handle, userdata, status, *(uint64_t *)cookie, ctx->ctx_index); handle, userdata, status, cookie, ctx->ctx_index,
ctx->cdm_userdata.request_id);
} else if (status == CAM_CDM_CB_STATUS_PAGEFAULT || } else if (status == CAM_CDM_CB_STATUS_PAGEFAULT ||
status == CAM_CDM_CB_STATUS_INVALID_BL_CMD || status == CAM_CDM_CB_STATUS_INVALID_BL_CMD ||
status == CAM_CDM_CB_STATUS_HW_ERROR) { status == CAM_CDM_CB_STATUS_HW_ERROR) {
ctx = userdata;
CAM_INFO(CAM_ISP, CAM_INFO(CAM_ISP,
"req_id =%d ctx_id =%d Bl_cmd_count =%d status=%d", "req_id =%d ctx_id =%d Bl_cmd_count =%d status=%d",
ctx->applied_req_id, ctx->ctx_index, ctx->applied_req_id, ctx->ctx_index,
@@ -1772,8 +1777,8 @@ void cam_tfe_cam_cdm_callback(uint32_t handle, void *userdata,
} else { } else {
CAM_WARN(CAM_ISP, CAM_WARN(CAM_ISP,
"Called by CDM hdl=%x, udata=%pK, status=%d, cookie=%llu", "CDM hdl=%x, udata=%pK, status=%d, cookie=%llu cdm_req=%llu",
handle, userdata, status, *(uint64_t *)cookie); handle, userdata, status, cookie, ctx->cdm_userdata.request_id);
} }
} }
@@ -2749,6 +2754,8 @@ static int cam_tfe_mgr_config_hw(void *hw_mgr_priv,
hw_update_data = (struct cam_isp_prepare_hw_update_data *) cfg->priv; hw_update_data = (struct cam_isp_prepare_hw_update_data *) cfg->priv;
hw_update_data->isp_mgr_ctx = ctx; hw_update_data->isp_mgr_ctx = ctx;
ctx->cdm_userdata.request_id = cfg->request_id;
ctx->cdm_userdata.hw_update_data = hw_update_data;
if (cfg->reapply_type && cfg->cdm_reset_before_apply) { if (cfg->reapply_type && cfg->cdm_reset_before_apply) {
if (ctx->last_cdm_done_req < cfg->request_id) { if (ctx->last_cdm_done_req < cfg->request_id) {
@@ -2811,7 +2818,7 @@ static int cam_tfe_mgr_config_hw(void *hw_mgr_priv,
cdm_cmd->cmd_arrary_count = cfg->num_hw_update_entries; cdm_cmd->cmd_arrary_count = cfg->num_hw_update_entries;
cdm_cmd->type = CAM_CDM_BL_CMD_TYPE_MEM_HANDLE; cdm_cmd->type = CAM_CDM_BL_CMD_TYPE_MEM_HANDLE;
cdm_cmd->flag = true; cdm_cmd->flag = true;
cdm_cmd->userdata = hw_update_data; cdm_cmd->userdata = ctx;
cdm_cmd->cookie = cfg->request_id; cdm_cmd->cookie = cfg->request_id;
cdm_cmd->gen_irq_arb = false; cdm_cmd->gen_irq_arb = false;
cdm_cmd->genirq_buff = &hw_update_data->kmd_cmd_buff_info; cdm_cmd->genirq_buff = &hw_update_data->kmd_cmd_buff_info;
@@ -5086,6 +5093,38 @@ outportlog:
} }
static void *cam_tfe_mgr_user_dump_stream_info(
void *dump_struct, uint8_t *addr_ptr)
{
struct cam_tfe_hw_mgr_ctx *ctx = NULL;
struct cam_isp_hw_mgr_res *hw_mgr_res = NULL;
struct cam_isp_resource_node *hw_res = NULL;
int32_t *addr;
int i;
int hw_idx[CAM_ISP_HW_SPLIT_MAX] = { -1, -1 };
ctx = (struct cam_tfe_hw_mgr_ctx *)dump_struct;
if (!list_empty(&ctx->res_list_tfe_in)) {
hw_mgr_res = list_first_entry(&ctx->res_list_tfe_in,
struct cam_isp_hw_mgr_res, list);
for (i = 0; i < CAM_ISP_HW_SPLIT_MAX; i++) {
hw_res = hw_mgr_res->hw_res[i];
if (hw_res && hw_res->hw_intf)
hw_idx[i] = hw_res->hw_intf->hw_idx;
}
}
addr = (int32_t *)addr_ptr;
*addr++ = ctx->is_dual;
*addr++ = hw_idx[CAM_ISP_HW_SPLIT_LEFT];
*addr++ = hw_idx[CAM_ISP_HW_SPLIT_RIGHT];
return addr;
}
static int cam_tfe_mgr_cmd(void *hw_mgr_priv, void *cmd_args) static int cam_tfe_mgr_cmd(void *hw_mgr_priv, void *cmd_args)
{ {
int rc = 0; int rc = 0;
@@ -5165,6 +5204,12 @@ static int cam_tfe_mgr_cmd(void *hw_mgr_priv, void *cmd_args)
case CAM_ISP_HW_MGR_CMD_UPDATE_CLOCK: case CAM_ISP_HW_MGR_CMD_UPDATE_CLOCK:
rc = cam_tfe_hw_mgr_csiphy_clk_sync(ctx, isp_hw_cmd_args->cmd_data); rc = cam_tfe_hw_mgr_csiphy_clk_sync(ctx, isp_hw_cmd_args->cmd_data);
break; break;
case CAM_ISP_HW_MGR_DUMP_STREAM_INFO:
rc = cam_common_user_dump_helper(
(void *)(isp_hw_cmd_args->cmd_data),
cam_tfe_mgr_user_dump_stream_info, ctx,
sizeof(int32_t), "ISP_STREAM_INFO_FROM_TFE_HW_MGR:");
break;
default: default:
CAM_ERR(CAM_ISP, "Invalid HW mgr command:0x%x, ISP HW mgr cmd:0x%x", CAM_ERR(CAM_ISP, "Invalid HW mgr command:0x%x, ISP HW mgr cmd:0x%x",
hw_cmd_args->cmd_type, isp_hw_cmd_args->cmd_type); hw_cmd_args->cmd_type, isp_hw_cmd_args->cmd_type);

View File

@@ -72,6 +72,17 @@ struct cam_tfe_comp_record_query {
void *reserved; void *reserved;
}; };
/**
* struct cam_tfe_cdm_user_data - TFE HW user data with CDM
*
* @prepare: hw_update_data
* @request_id: Request id
*/
struct cam_tfe_cdm_user_data {
struct cam_isp_prepare_hw_update_data *hw_update_data;
uint64_t request_id;
};
/** /**
* struct cam_tfe_hw_mgr_ctx - TFE HW manager Context object * struct cam_tfe_hw_mgr_ctx - TFE HW manager Context object
* *
@@ -114,6 +125,7 @@ struct cam_tfe_comp_record_query {
* @packet CSL packet from user mode driver * @packet CSL packet from user mode driver
* @bw_config_version BW Config version * @bw_config_version BW Config version
* @tfe_bus_comp_grp pointer to tfe comp group info * @tfe_bus_comp_grp pointer to tfe comp group info
* @cdm_userdata CDM user data
*/ */
struct cam_tfe_hw_mgr_ctx { struct cam_tfe_hw_mgr_ctx {
struct list_head list; struct list_head list;
@@ -157,6 +169,7 @@ struct cam_tfe_hw_mgr_ctx {
struct cam_packet *packet; struct cam_packet *packet;
uint32_t bw_config_version; uint32_t bw_config_version;
struct cam_tfe_hw_comp_record *tfe_bus_comp_grp; struct cam_tfe_hw_comp_record *tfe_bus_comp_grp;
struct cam_tfe_cdm_user_data cdm_userdata;
}; };
/** /**

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@@ -349,7 +349,7 @@ static void cam_tfe_log_error_irq_status(
for (i = 0; i < top_priv->common_data.common_reg->num_debug_reg; i++) { for (i = 0; i < top_priv->common_data.common_reg->num_debug_reg; i++) {
val_0 = cam_io_r(mem_base + val_0 = cam_io_r(mem_base +
top_priv->common_data.common_reg->debug_reg[i]); top_priv->common_data.common_reg->debug_reg[i]);
CAM_INFO(CAM_ISP, "Top debug [i]:0x%x", i, val_0); CAM_INFO(CAM_ISP, "Top debug [%d]:0x%x", i, val_0);
} }
cam_cpas_dump_camnoc_buff_fill_info(soc_private->cpas_handle); cam_cpas_dump_camnoc_buff_fill_info(soc_private->cpas_handle);
@@ -445,7 +445,8 @@ static void cam_tfe_log_error_irq_status(
"TFE clock rate:%d TFE total bw applied:%lld", "TFE clock rate:%d TFE total bw applied:%lld",
top_priv->hw_clk_rate, top_priv->hw_clk_rate,
top_priv->total_bw_applied); top_priv->total_bw_applied);
cam_cpas_log_votes();
cam_cpas_log_votes(false);
} }
static int cam_tfe_error_irq_bottom_half( static int cam_tfe_error_irq_bottom_half(

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@@ -1,6 +1,7 @@
/* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */ /* SPDX-License-Identifier: GPL-2.0-only WITH Linux-syscall-note */
/* /*
* Copyright (c) 2019-2021, The Linux Foundation. All rights reserved. * Copyright (c) 2019-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
*/ */
#ifndef __UAPI_CAM_ISP_TFE_H__ #ifndef __UAPI_CAM_ISP_TFE_H__
@@ -24,7 +25,10 @@
#define CAM_ISP_TFE_OUT_RES_DS4 (CAM_ISP_TFE_OUT_RES_BASE + 12) #define CAM_ISP_TFE_OUT_RES_DS4 (CAM_ISP_TFE_OUT_RES_BASE + 12)
#define CAM_ISP_TFE_OUT_RES_DS16 (CAM_ISP_TFE_OUT_RES_BASE + 13) #define CAM_ISP_TFE_OUT_RES_DS16 (CAM_ISP_TFE_OUT_RES_BASE + 13)
#define CAM_ISP_TFE_OUT_RES_AI (CAM_ISP_TFE_OUT_RES_BASE + 14) #define CAM_ISP_TFE_OUT_RES_AI (CAM_ISP_TFE_OUT_RES_BASE + 14)
#define CAM_ISP_TFE_OUT_RES_MAX (CAM_ISP_TFE_OUT_RES_BASE + 15) #define CAM_ISP_TFE_OUT_RES_PD_LCR_STATS (CAM_ISP_TFE_OUT_RES_BASE + 15)
#define CAM_ISP_TFE_OUT_RES_PD_PREPROCESSED (CAM_ISP_TFE_OUT_RES_BASE + 16)
#define CAM_ISP_TFE_OUT_RES_PD_PARSED (CAM_ISP_TFE_OUT_RES_BASE + 17)
#define CAM_ISP_TFE_OUT_RES_MAX (CAM_ISP_TFE_OUT_RES_BASE + 18)
/* TFE input port resource type */ /* TFE input port resource type */