disp: msm: assert nrt vbif halt req as part of rscc mode2 sequence

Add changes to assert nrt vbif halt request as part
of rscc mode2 sequence even if NRT path is not used
for rscc enabled targets to avoid hangs in some
stability cases.

Change-Id: I8b9e13738634e305c9e9ce19dfa3a88b61a2fb9f
Signed-off-by: Jayaprakash <[email protected]>

msm/sde_rsc_hw_v3.c

@@ -106,17 +106,17 @@ static int _rsc_hw_seq_memory_init_v3(struct sde_rsc_priv *rsc)
 
 	/* Mode - 2 sequence */
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x18,
-						0xbdf9b9a0, rsc->debug_mode);
+						0xf9b9baa0, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x1c,
-						0xa13899fe, rsc->debug_mode);
+						0x999afebd, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x20,
-						0xe0ac81e1, rsc->debug_mode);
+						0x81e1a138, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x24,
-						0x3982e2a2, rsc->debug_mode);
+						0xe2a2e0ac, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x28,
-						0x208cfd9d, rsc->debug_mode);
+						0xfd9d3982, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x2c,
-						0x20202020, rsc->debug_mode);
+						0x2020208c, rsc->debug_mode);
 	dss_reg_w(&rsc->drv_io, SDE_RSCC_SEQ_MEM_0_DRV0 + 0x30,
 						0x20202020, rsc->debug_mode);