msm: eva: Load FW as single image
The change also allows runtime change of auto-pil setting. It will help presilicon bring up. Change-Id: I9fd97a09e6730a2e13ae4503c74f8a2962c614c5 Signed-off-by: George Shen <quic_sqiao@quicinc.com>
This commit is contained in:
@@ -40,7 +40,7 @@ static int __load_fw_to_memory(struct platform_device *pdev,
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dprintk(CVP_ERR, "%s: Invalid fw name\n", __func__);
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dprintk(CVP_ERR, "%s: Invalid fw name\n", __func__);
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return -EINVAL;
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return -EINVAL;
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}
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}
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scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mdt", fw_name);
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scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name);
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rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id);
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rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id);
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if (rc) {
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if (rc) {
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@@ -144,7 +144,7 @@ void *msm_cvp_open(int core_id, int session_type)
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goto err_invalid_core;
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goto err_invalid_core;
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}
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}
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if (!core->resources.auto_pil && session_type == MSM_CVP_BOOT) {
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if (!msm_cvp_auto_pil && session_type == MSM_CVP_BOOT) {
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dprintk(CVP_SESS, "Auto PIL disabled, bypass CVP init at boot");
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dprintk(CVP_SESS, "Auto PIL disabled, bypass CVP init at boot");
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goto err_invalid_core;
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goto err_invalid_core;
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}
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}
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@@ -22,6 +22,7 @@ int msm_cvp_fw_debug = 0x18;
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int msm_cvp_fw_debug_mode = 1;
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int msm_cvp_fw_debug_mode = 1;
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int msm_cvp_fw_low_power_mode = 1;
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int msm_cvp_fw_low_power_mode = 1;
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bool msm_cvp_fw_coverage = !true;
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bool msm_cvp_fw_coverage = !true;
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bool msm_cvp_auto_pil = true;
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bool msm_cvp_cacheop_enabled = true;
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bool msm_cvp_cacheop_enabled = true;
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bool msm_cvp_thermal_mitigation_disabled = !true;
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bool msm_cvp_thermal_mitigation_disabled = !true;
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bool msm_cvp_cacheop_disabled = !true;
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bool msm_cvp_cacheop_disabled = !true;
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@@ -255,6 +256,7 @@ struct dentry *msm_cvp_debugfs_init_drv(void)
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debugfs_create_u32("minidump_enable", 0644, dir,
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debugfs_create_u32("minidump_enable", 0644, dir,
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&msm_cvp_minidump_enable);
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&msm_cvp_minidump_enable);
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debugfs_create_bool("fw_coverage", 0644, dir, &msm_cvp_fw_coverage);
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debugfs_create_bool("fw_coverage", 0644, dir, &msm_cvp_fw_coverage);
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debugfs_create_bool("auto_pil", 0644, dir, &msm_cvp_auto_pil);
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debugfs_create_bool("disable_thermal_mitigation", 0644, dir,
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debugfs_create_bool("disable_thermal_mitigation", 0644, dir,
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&msm_cvp_thermal_mitigation_disabled);
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&msm_cvp_thermal_mitigation_disabled);
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debugfs_create_bool("enable_cacheop", 0644, dir,
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debugfs_create_bool("enable_cacheop", 0644, dir,
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@@ -58,6 +58,7 @@ extern int msm_cvp_fw_debug;
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extern int msm_cvp_fw_debug_mode;
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extern int msm_cvp_fw_debug_mode;
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extern int msm_cvp_fw_low_power_mode;
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extern int msm_cvp_fw_low_power_mode;
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extern bool msm_cvp_fw_coverage;
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extern bool msm_cvp_fw_coverage;
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extern bool msm_cvp_auto_pil;
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extern bool msm_cvp_thermal_mitigation_disabled;
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extern bool msm_cvp_thermal_mitigation_disabled;
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extern bool msm_cvp_cacheop_disabled;
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extern bool msm_cvp_cacheop_disabled;
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extern int msm_cvp_clock_voting;
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extern int msm_cvp_clock_voting;
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@@ -44,10 +44,6 @@ static struct msm_cvp_common_data default_common_data[] = {
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};
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};
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static struct msm_cvp_common_data sm8450_common_data[] = {
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static struct msm_cvp_common_data sm8450_common_data[] = {
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{
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.key = "qcom,auto-pil",
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.value = 1,
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},
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{
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{
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.key = "qcom,pm-qos-latency-us",
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.key = "qcom,pm-qos-latency-us",
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.value = 50,
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.value = 50,
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@@ -100,10 +96,6 @@ static struct msm_cvp_common_data sm8450_common_data[] = {
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};
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};
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static struct msm_cvp_common_data sm8550_common_data[] = {
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static struct msm_cvp_common_data sm8550_common_data[] = {
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{
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.key = "qcom,auto-pil",
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.value = 1,
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},
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{
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{
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.key = "qcom,pm-qos-latency-us",
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.key = "qcom,pm-qos-latency-us",
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.value = 50,
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.value = 50,
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@@ -766,9 +766,6 @@ int cvp_read_platform_resources_from_drv_data(
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dprintk(CVP_CORE, "Firmware filename: %s\n", res->fw_name);
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dprintk(CVP_CORE, "Firmware filename: %s\n", res->fw_name);
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res->auto_pil = find_key_value(platform_data,
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"qcom,auto-pil");
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res->dsp_enabled = find_key_value(platform_data,
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res->dsp_enabled = find_key_value(platform_data,
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"qcom,dsp-enabled");
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"qcom,dsp-enabled");
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@@ -174,7 +174,6 @@ struct msm_cvp_platform_resources {
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struct reset_set reset_set;
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struct reset_set reset_set;
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bool use_non_secure_pil;
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bool use_non_secure_pil;
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bool sw_power_collapsible;
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bool sw_power_collapsible;
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bool auto_pil;
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bool dsp_enabled;
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bool dsp_enabled;
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struct list_head context_banks;
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struct list_head context_banks;
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bool thermal_mitigable;
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bool thermal_mitigable;
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