msm: eva: Load FW as single image

The change also allows runtime change of auto-pil setting. It will
help presilicon bring up.

Change-Id: I9fd97a09e6730a2e13ae4503c74f8a2962c614c5
Signed-off-by: George Shen <quic_sqiao@quicinc.com>

msm/eva/cvp_fw_load.c

@@ -40,7 +40,7 @@ static int __load_fw_to_memory(struct platform_device *pdev,
 		dprintk(CVP_ERR, "%s: Invalid fw name\n", __func__);
 		return -EINVAL;
 	}
-	scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mdt", fw_name);
+	scnprintf(firmware_name, ARRAY_SIZE(firmware_name), "%s.mbn", fw_name);
 
 	rc = of_property_read_u32(pdev->dev.of_node, "pas-id", &pas_id);
 	if (rc) {

msm/eva/msm_cvp_core.c

@@ -144,7 +144,7 @@ void *msm_cvp_open(int core_id, int session_type)
 		goto err_invalid_core;
 	}
 
-	if (!core->resources.auto_pil && session_type == MSM_CVP_BOOT) {
+	if (!msm_cvp_auto_pil && session_type == MSM_CVP_BOOT) {
 		dprintk(CVP_SESS, "Auto PIL disabled, bypass CVP init at boot");
 		goto err_invalid_core;
 	}

msm/eva/msm_cvp_debug.c

@@ -22,6 +22,7 @@ int msm_cvp_fw_debug = 0x18;
 int msm_cvp_fw_debug_mode = 1;
 int msm_cvp_fw_low_power_mode = 1;
 bool msm_cvp_fw_coverage = !true;
+bool msm_cvp_auto_pil = true;
 bool msm_cvp_cacheop_enabled = true;
 bool msm_cvp_thermal_mitigation_disabled = !true;
 bool msm_cvp_cacheop_disabled = !true;
@@ -255,6 +256,7 @@ struct dentry *msm_cvp_debugfs_init_drv(void)
 	debugfs_create_u32("minidump_enable", 0644, dir,
 			&msm_cvp_minidump_enable);
 	debugfs_create_bool("fw_coverage", 0644, dir, &msm_cvp_fw_coverage);
+	debugfs_create_bool("auto_pil", 0644, dir, &msm_cvp_auto_pil);
 	debugfs_create_bool("disable_thermal_mitigation", 0644, dir,
 			&msm_cvp_thermal_mitigation_disabled);
 	debugfs_create_bool("enable_cacheop", 0644, dir,

msm/eva/msm_cvp_debug.h

@@ -58,6 +58,7 @@ extern int msm_cvp_fw_debug;
 extern int msm_cvp_fw_debug_mode;
 extern int msm_cvp_fw_low_power_mode;
 extern bool msm_cvp_fw_coverage;
+extern bool msm_cvp_auto_pil;
 extern bool msm_cvp_thermal_mitigation_disabled;
 extern bool msm_cvp_cacheop_disabled;
 extern int msm_cvp_clock_voting;

msm/eva/msm_cvp_platform.c

@@ -44,10 +44,6 @@ static struct msm_cvp_common_data default_common_data[] = {
 };
 
 static struct msm_cvp_common_data sm8450_common_data[] = {
-	{
-		.key = "qcom,auto-pil",
-		.value = 1,
-	},
 	{
 		.key = "qcom,pm-qos-latency-us",
 		.value = 50,
@@ -100,10 +96,6 @@ static struct msm_cvp_common_data sm8450_common_data[] = {
 };
 
 static struct msm_cvp_common_data sm8550_common_data[] = {
-	{
-		.key = "qcom,auto-pil",
-		.value = 1,
-	},
 	{
 		.key = "qcom,pm-qos-latency-us",
 		.value = 50,

msm/eva/msm_cvp_res_parse.c

@@ -766,9 +766,6 @@ int cvp_read_platform_resources_from_drv_data(
 
 	dprintk(CVP_CORE, "Firmware filename: %s\n", res->fw_name);
 
-	res->auto_pil = find_key_value(platform_data,
-			"qcom,auto-pil");
-
 	res->dsp_enabled = find_key_value(platform_data,
 			"qcom,dsp-enabled");
 

msm/eva/msm_cvp_resources.h

@@ -174,7 +174,6 @@ struct msm_cvp_platform_resources {
 	struct reset_set reset_set;
 	bool use_non_secure_pil;
 	bool sw_power_collapsible;
-	bool auto_pil;
 	bool dsp_enabled;
 	struct list_head context_banks;
 	bool thermal_mitigable;