disp: msm: sde: handle first commit after resume for demura init property

Demura init property gets reapplied during first commit after resume.
However, first commit after resume is null commit and HFC correction
file will not be available during first commit.
This change marks error to warning for first commit after resume.

Change-Id: I01ec4bd977d60925d9b7a54076329c3becaa0b20
Signed-off-by: Sanskar Omar <[email protected]>

msm/sde/sde_color_processing.c

@@ -1842,6 +1842,7 @@ static void _sde_cp_crtc_commit_feature(struct sde_cp_node *prop_node,
 	hw_cfg.skip_blend_plane = sde_crtc->skip_blend_plane;
 	hw_cfg.skip_blend_plane_h = sde_crtc->skip_blend_plane_h;
 	hw_cfg.skip_blend_plane_w = sde_crtc->skip_blend_plane_w;
+	hw_cfg.is_crtc_enabled = sde_crtc->enabled;
 
 	hw_cfg.num_ds_enabled = sde_crtc_state->num_ds_enabled;
 

msm/sde/sde_hw_mdss.h

@@ -676,6 +676,7 @@ struct sde_mdss_color {
  * @skip_blend_plane_w: skip plane width
  * @skip_blend_plane_h: skip plane height
  * @num_ds_enabled: Number of destination scalers enabled
+ * @is_crtc_enabled: true if crtc is enabled
  */
 struct sde_hw_cp_cfg {
 	void *payload;
@@ -695,6 +696,7 @@ struct sde_hw_cp_cfg {
 	u32 skip_blend_plane_w;
 	u32 skip_blend_plane_h;
 	u32 num_ds_enabled;
+	bool is_crtc_enabled;
 };
 
 /**

msm/sde/sde_hw_reg_dma_v1_color_proc.c

@@ -6475,7 +6475,11 @@ static bool __reg_dmav1_valid_hfc_en_cfg(struct drm_msm_dem_cfg *dcfg,
 {
 	u32 h, w, temp;
 	if (!hw_cfg->valid_skip_blend_plane) {
-		DRM_ERROR("HFC plane not set\n");
+		if (hw_cfg->is_crtc_enabled)
+			DRM_ERROR("HFC plane not set\n");
+		else
+			DRM_WARN("Crtc is disabled, HFC plane not set\n");
+
 		return false;
 	}