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qca-wifi: Add DFS DA files to DA directory

 * These files are deleted from common dev.
 * DA:- Direct attach.

Change-Id: I6521841b76d2666666fa50775601b0f0f050d1d6
Signed-off-by: Visudha Sathurappan <[email protected]>
Visudha Sathurappan 6 years ago
parent
commit
c3e2443cc4

+ 224 - 0
direct_attach/umac/dfs/core/src/filtering/ar5212_radar.c

@@ -0,0 +1,224 @@
+/*
+ * Copyright (c) 2011, 2016-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2002-2005 Atheros Communications, Inc.
+ * Copyright (c) 2008-2010, Atheros Communications Inc.
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC: This file has the radar table for AR5212 chipset and function to
+ * initialize the radar table.
+ */
+#include "dfs.h"
+#include "dfs_internal.h"
+#include "wlan_dfs_utils_api.h"
+
+/* Default 5212/5312 radar phy parameters. */
+#define AR5212_DFS_FIRPWR -41
+#define AR5212_DFS_RRSSI  12
+#define AR5212_DFS_HEIGHT 20
+#define AR5212_DFS_PRSSI  22
+#define AR5212_DFS_INBAND 6
+
+/**
+ * struct dfs_pulse ar5212_etsi_radars - ETSI radar pulse table for
+ *                                       AR5212 chipset.
+ */
+struct dfs_pulse ar5212_etsi_radars[] = {
+	/* EN 302 502 frequency hopping pulse */
+	/* PRF 3000, 1us duration, 9 pulses per burst */
+	{9,   1, 3000, 3000, 1,  4,  5,  0,  1, 18,  0, 0, 1,  1000, 0, 40},
+	/* PRF 4500, 20us duration, 9 pulses per burst */
+	{9,  20, 4500, 4500, 1,  4,  5, 19, 21, 18,  0, 0, 1,  1000, 0, 41},
+
+	/* TYPE 1 */
+	{10, 2,   750,  0, 24, 50,  0,  2, 22,  0, 3, 0, 0},
+
+	/* TYPE 2 */
+	{7,  2,   200,  0, 24, 50,  0,  2, 22,  0, 3, 0, 1},
+	{7,  2,   300,  0, 24, 50,  0,  2, 22,  0, 3, 0, 2},
+	{7,  2,   500,  0, 24, 50,  0,  2, 22,  1, 3, 0, 3},
+	{7,  2,   800,  0, 24, 50,  0,  2, 22,  1, 3, 0, 4},
+	{7,  2,  1001,  0, 24, 50,  0,  2, 22,  0, 3, 0, 5},
+	{7,  8,   200,  0, 24, 50,  6,  9, 22,  8, 3, 0, 6},
+	{7,  8,   300,  0, 24, 50,  6,  9, 22,  8, 3, 0, 7},
+	{7,  8,   502,  0, 24, 50,  6,  9, 22,  0, 3, 0, 8},
+	{7,  8,   805,  0, 24, 50,  6,  9, 22,  0, 3, 0, 9},
+	{7,  8,  1008,  0, 24, 50,  6,  9, 22,  0, 3, 0, 10},
+
+	/* TYPE 3 */
+	{10, 14,  200,  0, 24, 50, 12, 15, 22, 14, 3, 0, 11},
+	{10, 14,  300,  0, 24, 50, 12, 15, 22, 14, 3, 0, 12},
+	{10, 14,  503,  0, 24, 50, 12, 15, 22,  2, 3, 0, 13},
+	{10, 14,  809,  0, 24, 50, 12, 15, 22,  0, 3, 0, 14},
+	{10, 14, 1014,  0, 24, 50, 12, 15, 22,  0, 3, 0, 15},
+	{10, 18,  200,  0, 24, 50, 15, 19, 22, 18, 3, 0, 16},
+	{10, 18,  301,  0, 24, 50, 15, 19, 22,  7, 3, 0, 17},
+	{10, 18,  504,  0, 24, 50, 15, 19, 22,  2, 3, 0, 18},
+	{10, 18,  811,  0, 24, 50, 15, 19, 22,  0, 3, 0, 19},
+	{10, 18, 1018,  0, 24, 50, 15, 19, 22,  0, 3, 0, 20},
+
+	/* TYPE 4 */
+	{10, 2,  1200,  0, 24, 50,  0,  2, 22,  0, 3, 0, 21},
+	{10, 2,  1500,  0, 24, 50,  0,  2, 22,  0, 3, 0, 22},
+	{10, 2,  1600,  0, 24, 50,  0,  2, 22,  0, 3, 0, 23},
+	{10, 8,  1212,  0, 24, 50,  6,  9, 22,  0, 3, 0, 24},
+	{10, 8,  1517,  0, 24, 50,  6,  9, 22,  0, 3, 0, 25},
+	{10, 8,  1620,  0, 24, 50,  6,  9, 22,  0, 3, 0, 26},
+	{10, 14, 1221,  0, 24, 50, 12, 15, 22,  0, 3, 0, 27},
+	{10, 14, 1531,  0, 24, 50, 12, 15, 22,  0, 3, 0, 28},
+	{10, 14, 1636,  0, 24, 50, 12, 15, 22,  0, 3, 0, 29},
+	{10, 18, 1226,  0, 24, 50, 15, 19, 22,  0, 3, 0, 30},
+	{10, 18, 1540,  0, 24, 50, 15, 19, 22,  0, 3, 0, 31},
+	{10, 18, 1647,  0, 24, 50, 15, 19, 22,  0, 3, 0, 32},
+
+	/* TYPE 5 */
+	{17, 2,  2305,  0, 24, 50,  0,  2, 22,  0, 3, 0, 33},
+	{17, 2,  3009,  0, 24, 50,  0,  2, 22,  0, 3, 0, 34},
+	{17, 2,  3512,  0, 24, 50,  0,  2, 22,  0, 3, 0, 35},
+	{17, 2,  4016,  0, 24, 50,  0,  2, 22,  0, 3, 0, 36},
+	{17, 8,  2343,  0, 24, 50,  6,  9, 22,  0, 3, 0, 37},
+	{17, 8,  3073,  0, 24, 50,  6,  9, 22,  0, 3, 0, 38},
+	{17, 8,  3601,  0, 24, 50,  6,  9, 22,  0, 3, 0, 39},
+	{17, 8,  4132,  0, 24, 50,  6,  9, 22,  0, 3, 0, 40},
+	{17, 14, 2376,  0, 24, 50, 12, 15, 22,  0, 3, 0, 41},
+	{17, 14, 3131,  0, 24, 50, 12, 15, 22,  0, 3, 0, 42},
+	{17, 14, 3680,  0, 24, 50, 12, 15, 22,  0, 3, 0, 43},
+	{17, 14, 4237,  0, 24, 50, 12, 15, 22,  0, 3, 0, 44},
+	{17, 18, 2399,  0, 24, 50, 15, 19, 22,  0, 3, 0, 45},
+	{17, 18, 3171,  0, 24, 50, 15, 19, 22,  0, 3, 0, 46},
+	{17, 18, 3735,  0, 24, 50, 15, 19, 22,  0, 3, 0, 47},
+	{17, 18, 4310,  0, 24, 50, 15, 19, 22,  0, 3, 0, 48},
+
+	/* TYPE 6 */
+	{14, 22, 2096,  0, 24, 50, 21, 24, 22,  0, 3, 0, 49},
+	{14, 22, 3222,  0, 24, 50, 21, 24, 22,  0, 3, 0, 50},
+	{14, 22, 4405,  0, 24, 50, 21, 24, 22,  0, 3, 0, 51},
+	{14, 32, 2146,  0, 24, 50, 30, 35, 22,  0, 3, 0, 52},
+	{14, 32, 3340,  0, 24, 50, 30, 35, 22,  0, 3, 0, 53},
+	{14, 32, 4629,  0, 24, 50, 30, 35, 22,  0, 3, 0, 54},
+};
+
+/**
+ * struct dfs_pulse ar5212_fcc_radars - FCC radar pulse table for
+ *                                       AR5212 chipset.
+ */
+struct dfs_pulse ar5212_fcc_radars[] = {
+	/* following two filters are specific to Japan/MKK4 */
+	{16,   2,  720,  6, 40,  0,  2, 18,  0, 3, 0, 30},
+	{16,   3,  260,  6, 40,  0,  5, 18,  0, 3, 0, 31},
+
+	/* following filters are common to both FCC and JAPAN */
+	{9,   2, 3003,   6, 50,  0,  2, 18,  0, 0, 0, 29},
+	{16,  2,  700,   6, 35,  0,  2, 18,  0, 3, 0, 28},
+
+	{10,  3, 6666,  10, 90,  2,  3, 22,  0, 3,  0, 0},
+	{10,  3, 5900,  10, 90,  2,  3, 22,  0, 3,  0, 1},
+	{10,  3, 5200,  10, 90,  2,  3, 22,  0, 3,  0, 2},
+	{10,  3, 4800,  10, 90,  2,  3, 22,  0, 3,  0, 3},
+	{10,  3, 4400,  10, 90,  2,  3, 22,  0, 3,  0, 4},
+	{10,  5, 6666,  50, 30,  3, 10, 22,  0, 3,  0, 5},
+	{10,  5, 5900,  70, 30,  3, 10, 22,  0, 3,  0, 6},
+	{10,  5, 5200,  70, 30,  3, 10, 22,  0, 3,  0, 7},
+	{10,  5, 4800,  70, 30,  3, 10, 22,  0, 3,  0, 8},
+	{10,  5, 4400,  50, 30,  3,  9, 22,  0, 3,  0, 9},
+
+	{8,  10, 5000, 100, 40,  7, 17, 22,  0, 3, 0, 10},
+	{8,  10, 3000, 100, 40,  7, 17, 22,  0, 3, 0, 11},
+	{8,  10, 2000,  40, 40,  9, 17, 22,  0, 3, 0, 12},
+	{8,  14, 5000, 100, 40, 13, 16, 22,  0, 3, 0, 13},
+	{8,  14, 3000, 100, 40, 13, 16, 22,  0, 3, 0, 14},
+	{8,  14, 2000,  40, 40, 13, 16, 22,  0, 3, 0, 15},
+
+	{6,  10, 5000,  80, 40, 10, 15, 22,  0, 3, 0, 16},
+	{6,  10, 3000,  80, 40, 10, 15, 22,  0, 3, 0, 17},
+	{6,  10, 2000,  40, 40, 10, 15, 22,  0, 3, 0, 18},
+	{6,  10, 5000,  80, 40, 10, 12, 22,  0, 3, 0, 19},
+	{6,  10, 3000,  80, 40, 10, 12, 22,  0, 3, 0, 20},
+	{6,  10, 2000,  40, 40, 10, 12, 22,  0, 3, 0, 21},
+
+	{6,  18, 5000,  80, 40, 16, 25, 22,  0, 3, 0, 22},
+	{6,  18, 3000,  80, 40, 16, 25, 22,  0, 3, 0, 23},
+	{6,  18, 2000,  40, 40, 16, 25, 22,  0, 3, 0, 24},
+
+	{6,  21, 5000,  80, 40, 12, 25, 22,  0, 3, 0, 25},
+	{6,  21, 3000,  80, 40, 12, 25, 22,  0, 3, 0, 26},
+	{6,  21, 2000,  40, 40, 12, 25, 22,  0, 3, 0, 27},
+};
+
+/**
+ * struct dfs_bin5pulse ar5212_bin5pulses - BIN5 pulse for AR5212 chipset.
+ */
+struct dfs_bin5pulse ar5212_bin5pulses[] = {
+	{5, 52, 100, 12, 22, 3},
+};
+
+void dfs_get_radars_for_ar5212(struct wlan_dfs *dfs)
+{
+	struct wlan_dfs_radar_tab_info rinfo;
+	int dfsdomain = DFS_FCC_DOMAIN;
+
+	qdf_mem_zero(&rinfo, sizeof(rinfo));
+	dfsdomain = utils_get_dfsdomain(dfs->dfs_pdev_obj);
+
+	switch (dfsdomain) {
+	case DFS_FCC_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_FCC_DOMAIN_5212");
+		rinfo.dfsdomain = DFS_FCC_DOMAIN;
+		rinfo.dfs_radars = &ar5212_fcc_radars[2];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar5212_fcc_radars)-2;
+		rinfo.b5pulses = &ar5212_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5212_bin5pulses);
+		break;
+	case DFS_ETSI_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_ETSI_DOMAIN_5412");
+		rinfo.dfsdomain = DFS_ETSI_DOMAIN;
+
+		if (dfs_is_en302_502_applicable(dfs)) {
+			rinfo.dfs_radars = ar5212_etsi_radars;
+			rinfo.numradars = QDF_ARRAY_SIZE(ar5212_etsi_radars);
+		} else {
+			uint8_t offset = ETSI_LEGACY_PULSE_ARR_OFFSET;
+
+			rinfo.dfs_radars = &ar5212_etsi_radars[offset];
+			rinfo.numradars =
+				QDF_ARRAY_SIZE(ar5212_etsi_radars) - offset;
+		}
+		rinfo.b5pulses = &ar5212_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5212_bin5pulses);
+		break;
+	case DFS_MKK4_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_MKK4_DOMAIN_5412");
+		rinfo.dfsdomain = DFS_MKK4_DOMAIN;
+		rinfo.dfs_radars = &ar5212_fcc_radars[0];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar5212_fcc_radars);
+		rinfo.b5pulses = &ar5212_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5212_bin5pulses);
+		break;
+	default:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "No domain");
+		return;
+	}
+
+	rinfo.dfs_defaultparams.pe_firpwr = AR5212_DFS_FIRPWR;
+	rinfo.dfs_defaultparams.pe_rrssi = AR5212_DFS_RRSSI;
+	rinfo.dfs_defaultparams.pe_height = AR5212_DFS_HEIGHT;
+	rinfo.dfs_defaultparams.pe_prssi = AR5212_DFS_PRSSI;
+	rinfo.dfs_defaultparams.pe_inband = AR5212_DFS_INBAND;
+
+	dfs_init_radar_filters(dfs, &rinfo);
+}

+ 172 - 0
direct_attach/umac/dfs/core/src/filtering/ar5416_radar.c

@@ -0,0 +1,172 @@
+/*
+ * Copyright (c) 2011, 2016-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2002-2005 Atheros Communications, Inc.
+ * Copyright (c) 2008-2010, Atheros Communications Inc.
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC: This file has the radar table for AR5416 chipset and function to
+ * initialize the radar table.
+ */
+
+#include "dfs.h"
+#include "dfs_internal.h"
+#include "wlan_dfs_utils_api.h"
+
+/* Default 5413/5416 radar phy parameters. */
+#define AR5416_DFS_FIRPWR  -33
+#define AR5416_DFS_RRSSI   20
+#define AR5416_DFS_HEIGHT  10
+#define AR5416_DFS_PRSSI   15
+#define AR5416_DFS_INBAND  15
+#define AR5416_DFS_RELPWR  8
+#define AR5416_DFS_RELSTEP 12
+#define AR5416_DFS_MAXLEN  255
+
+/**
+ * struct dfs_pulse ar5416_etsi_radars - ETSI radar pulse table for
+ *                                       AR5416 chipset.
+ */
+struct dfs_pulse ar5416_etsi_radars[] = {
+
+	/* EN 302 502 frequency hopping pulse */
+	/* PRF 3000, 1us duration, 9 pulses per burst */
+	{9,   1, 3000, 3000, 1,  4,  5,  0,  1, 18,  0, 0, 1,  1000, 0, 40},
+	/* PRF 4500, 20us duration, 9 pulses per burst */
+	{9,  20, 4500, 4500, 1,  4,  5, 19, 21, 18,  0, 0, 1,  1000, 0, 41},
+
+	/* TYPE staggered pulse */
+	/* 0.8-2us, 2-3 bursts,300-400 PRF, 10 pulses each */
+	{20,  2,  300,  400, 2, 30,  4,  0,  2, 15, 0,   0, 0, 0, 0, 31},
+	/* 0.8-2us, 2-3 bursts, 400-1200 PRF, 15 pulses each */
+	{30,  2,  400, 1200, 2, 30,  7,  0,  2, 15, 0,   0, 0, 0, 0, 32},
+
+	/* constant PRF based */
+	/* 0.8-5us, 200  300 PRF, 10 pulses */
+	{10, 5,   200,  400, 0, 24,  5,  0,  8, 18, 0,   0, 0, 0, 0, 33},
+	{10, 5,   400,  600, 0, 24,  5,  0,  8, 18, 0,   0, 0, 0, 0, 37},
+	{10, 5,   600,  800, 0, 24,  5,  0,  8, 18, 0,   0, 0, 0, 0, 38},
+	{10, 5,   800, 1000, 0, 24,  5,  0,  8, 18, 0,   0, 0, 0, 0, 39},
+
+	/* 0.8-15us, 200-1600 PRF, 15 pulses */
+	{15, 15,  200, 1600, 0, 24, 6,  0, 18, 15, 0,   0, 0, 0, 0, 34},
+
+	/* 0.8-15us, 2300-4000 PRF, 25 pulses*/
+	{25, 15, 2300, 4000,  0, 24, 8, 0, 18, 15, 0,   0, 0, 0, 0, 35},
+
+	/* 20-30us, 2000-4000 PRF, 20 pulses*/
+	{20, 30, 2000, 4000, 0, 24, 8, 19, 33, 15, 0,   0, 0, 0, 0, 36},
+};
+
+/**
+ * struct dfs_pulse ar5416_fcc_radars - FCC radar pulse table for
+ *                                       AR5416 chipset.
+ */
+struct dfs_pulse ar5416_fcc_radars[] = {
+	/* following two filters are specific to Japan/MKK4 */
+	/* 1389 +/- 6 us */
+	{18,  1,  720,  720, 0,  6,  6,  0,  1, 18,  0, 3, 0, 0, 0, 17},
+	/* 4000 +/- 6 us */
+	{18,  4,  250,  250, 0, 10,  5,  1,  6, 18,  0, 3, 0, 0, 0, 18},
+	/* 3846 +/- 7 us */
+	{18,  5,  260,  260, 0, 10,  6,  1,  6, 18,  0, 3, 0, 0, 0, 19},
+
+	/* following filters are common to both FCC and JAPAN */
+	/* FCC TYPE 1 */
+	{18,  1,  700, 700, 0,  6,  5,  0,  1, 18,  0, 3,  0, 0, 0, 0},
+	{18,  1,  350, 350, 0,  6,  5,  0,  1, 18,  0, 3,  0, 0, 0, 0},
+
+	/* FCC TYPE 6 */
+	{9,   1, 3003, 3003, 1,  7,  5,  0,  1, 18,  0, 0,  0, 0, 0, 1},
+
+	/* FCC TYPE 2 */
+	{23, 5, 4347, 6666, 0, 18, 11,  0,  7, 20,  0, 3,  0, 0, 0, 2},
+
+	/* FCC TYPE 3 */
+	{18, 10, 2000, 5000, 0, 23,  8,  6, 13, 20,  0, 3, 0, 0, 0, 5},
+
+	/* FCC TYPE 4 */
+	{16, 15, 2000, 5000, 0, 25,  7, 11, 23, 20,  0, 3, 0, 0, 0, 11},
+};
+
+/**
+ * struct dfs_bin5pulse ar5416_bin5pulses - BIN5 pulse for AR5416 chipset.
+ */
+struct dfs_bin5pulse ar5416_bin5pulses[] = {
+	{2, 28, 105, 12, 22, 5},
+};
+
+void dfs_get_radars_for_ar5416(struct wlan_dfs *dfs)
+{
+	struct wlan_dfs_radar_tab_info rinfo;
+	int dfsdomain = DFS_FCC_DOMAIN;
+
+	qdf_mem_zero(&rinfo, sizeof(rinfo));
+	dfsdomain = utils_get_dfsdomain(dfs->dfs_pdev_obj);
+
+	switch (dfsdomain) {
+	case DFS_FCC_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_FCC_DOMAIN_5416");
+		rinfo.dfsdomain = DFS_FCC_DOMAIN;
+		rinfo.dfs_radars = &ar5416_fcc_radars[3];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar5416_fcc_radars)-3;
+		rinfo.b5pulses = &ar5416_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5416_bin5pulses);
+		break;
+	case DFS_ETSI_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_ETSI_DOMAIN_5416");
+		rinfo.dfsdomain = DFS_ETSI_DOMAIN;
+
+		if (dfs_is_en302_502_applicable(dfs)) {
+			rinfo.dfs_radars = ar5416_etsi_radars;
+			rinfo.numradars = QDF_ARRAY_SIZE(ar5416_etsi_radars);
+		} else {
+			uint8_t offset = ETSI_LEGACY_PULSE_ARR_OFFSET;
+
+			rinfo.dfs_radars = &ar5416_etsi_radars[offset];
+			rinfo.numradars =
+				QDF_ARRAY_SIZE(ar5416_etsi_radars) - offset;
+		}
+
+		rinfo.b5pulses = &ar5416_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5416_bin5pulses);
+		break;
+	case DFS_MKK4_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_MKK4_DOMAIN_5416");
+		rinfo.dfsdomain = DFS_MKK4_DOMAIN;
+		rinfo.dfs_radars = &ar5416_fcc_radars[0];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar5416_fcc_radars);
+		rinfo.b5pulses = &ar5416_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar5416_bin5pulses);
+		break;
+	default:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "no domain");
+		return;
+	}
+
+	rinfo.dfs_defaultparams.pe_firpwr = AR5416_DFS_FIRPWR;
+	rinfo.dfs_defaultparams.pe_rrssi = AR5416_DFS_RRSSI;
+	rinfo.dfs_defaultparams.pe_height = AR5416_DFS_HEIGHT;
+	rinfo.dfs_defaultparams.pe_prssi = AR5416_DFS_PRSSI;
+	rinfo.dfs_defaultparams.pe_inband = AR5416_DFS_INBAND;
+	rinfo.dfs_defaultparams.pe_relpwr = AR5416_DFS_RELPWR;
+	rinfo.dfs_defaultparams.pe_relstep = AR5416_DFS_RELSTEP;
+	rinfo.dfs_defaultparams.pe_maxlen = AR5416_DFS_MAXLEN;
+
+	dfs_init_radar_filters(dfs, &rinfo);
+}

+ 250 - 0
direct_attach/umac/dfs/core/src/filtering/ar9300_radar.c

@@ -0,0 +1,250 @@
+/*
+ * Copyright (c) 2011, 2016-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2008-2010, Atheros Communications Inc.
+ * All Rights Reserved.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for
+ * any purpose with or without fee is hereby granted, provided that the
+ * above copyright notice and this permission notice appear in all
+ * copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL
+ * WARRANTIES WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE
+ * AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL
+ * DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR
+ * PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR OTHER
+ * TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+ * PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC: This file has the radar table for AR9300 chipset and function to
+ * initialize the radar table.
+ */
+
+#include "dfs.h"
+#include "dfs_internal.h"
+#include "wlan_dfs_utils_api.h"
+#include "wlan_dfs_lmac_api.h"
+
+/*
+ * Default 5413/9300 radar phy parameters
+ * Values adjusted to fix EV76432/EV76320
+ */
+#define AR9300_DFS_FIRPWR    -28
+#define AR9300_DFS_RRSSI     0
+#define AR9300_DFS_HEIGHT    10
+#define AR9300_DFS_PRSSI     6
+#define AR9300_DFS_INBAND    8
+#define AR9300_DFS_RELPWR    8
+#define AR9300_DFS_RELSTEP   12
+#define AR9300_DFS_MAXLEN    255
+#define AR9300_DFS_PRSSI_CAC 10
+
+/*
+ * Make sure that value matches value in ar9300_osprey_2p2_mac_core[][2] for
+ * register 0x1040 to 0x104c.
+ */
+#define AR9300_FCC_RADARS_FCC_OFFSET 4
+
+/**
+ * struct dfs_pulse ar9300_etsi_radars - ETSI radar pulse table for
+ *                                       AR9300 chipset.
+ *
+ * For short pulses, RSSI threshold should be smaller than Kquick-drop.
+ * The chip has only one chance to drop the gain which will be reported
+ * as the estimated RSSI.
+ */
+struct dfs_pulse ar9300_etsi_radars[] = {
+
+	/* EN 302 502 frequency hopping pulse */
+	/* PRF 3000, 1us duration, 9 pulses per burst */
+	{9,   1, 3000, 3000, 1,  4,  5,  0,  1, 18,  0, 0, 1,  1000, 0, 40},
+	/* PRF 4500, 20us duration, 9 pulses per burst */
+	{9,  20, 4500, 4500, 1,  4,  5, 19, 21, 18,  0, 0, 1,  1000, 0, 41},
+
+	/* TYPE staggered pulse */
+	/* Type 5*/
+	/* 0.8-2us, 2-3 bursts,300-400 PRF, 10 pulses each */
+	{30,  2,  300,  400, 2, 30,  3,  0,  5, 15, 0,   0, 1, 0, 0, 31},
+	/* Type 6 */
+	/* 0.8-2us, 2-3 bursts, 400-1200 PRF, 15 pulses each */
+	{30,  2,  400, 1200, 2, 30,  7,  0,  5, 15, 0,   0, 0, 0, 0, 32},
+
+	/* constant PRF based */
+	/* Type 1 */
+	/* 0.8-5us, 200  300 PRF, 10 pulses */
+	{10, 5,   200,  400, 0, 24,  5,  0,  8, 15, 0,   0, 2, 0, 0, 33},
+	{10, 5,   400,  600, 0, 24,  5,  0,  8, 15, 0,   0, 2, 0, 0, 37},
+	{10, 5,   600,  800, 0, 24,  5,  0,  8, 15, 0,   0, 2, 0, 0, 38},
+	{10, 5,   800, 1000, 0, 24,  5,  0,  8, 15, 0,   0, 2, 0, 0, 39},
+
+	/* Type 2 */
+	/* 0.8-15us, 200-1600 PRF, 15 pulses */
+	{15, 15,  200, 1600, 0, 24, 8,  0, 18, 24, 0,   0, 0, 0, 0, 34},
+
+	/* Type 3 */
+	/* 0.8-15us, 2300-4000 PRF, 25 pulses*/
+	{25, 15, 2300, 4000,  0, 24, 10, 0, 18, 24, 0,   0, 0, 0, 0, 35},
+
+	/* Type 4 */
+	/* 20-30us, 2000-4000 PRF, 20 pulses*/
+	{20, 30, 2000, 4000, 0, 24, 8, 19, 33, 24, 0,   0, 0, 0, 0, 36},
+};
+
+/**
+ * struct dfs_pulse ar9300_fcc_radars - FCC radar pulse table for
+ *                                       AR9300 chipset.
+ */
+struct dfs_pulse ar9300_fcc_radars[] = {
+	/*
+	 * Format is as following:
+	 * Numpulses pulsedur pulsefreq max_pulsefreq patterntype pulsevar
+	 * threshold mindur maxdur rssithresh meanoffset rssimargin pulseid.
+	 */
+
+	/* following two filters are specific to Japan/MKK4 */
+	/* 1389 +/- 6 us */
+	{18,  1,  720,  720, 0,  6,  6,  0,  1, 18,  0, 3, 0, 0, 0, 17},
+	/* 4000 +/- 6 us */
+	{18,  4,  250,  250, 0, 10,  5,  1,  6, 18,  0, 3, 0, 0, 0, 18},
+	/* 3846 +/- 7 us */
+	{18,  5,  260,  260, 0, 10,  6,  1,  6, 18,  0, 3, 1, 0, 0, 19},
+	/* 3846 +/- 7 us */
+	{18, 5, 260, 260, 1, 10, 6, 1, 6, 18, 0, 3, 1, 0, 0, 20},
+
+	/* following filters are common to both FCC and JAPAN */
+
+	/* FCC TYPE 1 */
+	{18,  1,  700, 700, 0,  6,  5,  0,  1, 18,  0, 3, 1, 0, 0, 8},
+	{18,  1,  350, 350, 0,  6,  5,  0,  1, 18,  0, 3, 0, 0, 0, 0},
+
+	/* FCC TYPE 6 */
+	{9,   1, 3003, 3003, 0,  7,  5,  0,  1, 18,  0, 0, 1, 0, 0, 1},
+
+	/* FCC TYPE 2 */
+	{23, 5, 4347, 6666, 0, 18, 11,  0,  7, 22,  0, 3, 0, 0, 0, 2},
+
+	/* FCC TYPE 3 */
+	{18, 10, 2000, 5000, 0, 23,  8,  6, 13, 22,  0, 3, 0, 0, 0, 5},
+
+	/* FCC TYPE 4 */
+	{16, 15, 2000, 5000, 0, 25,  7, 11, 23, 22,  0, 3, 0, 0, 0, 11},
+
+	/* FCC NEW TYPE 1 */
+	/* Search duration is numpulses*maxpri.
+	 * The last theshold can be increased if false detects happen
+	 */
+	/* 518us to 938us pulses (min 56 pulses) */
+	{57, 1, 1066, 1930, 0, 6, 20,  0,  1, 22,  0, 3, 0, 0, 0, 21},
+	/* 938us to 2000 pulses (min 26 pulses) */
+	{27, 1,  500, 1066, 0, 6, 13,  0,  1, 22,  0, 3, 0, 0, 0, 22},
+	/* 2000 to 3067us pulses (min 17 pulses)*/
+	{18, 1,  325,  500, 0, 6,  9,  0,  1, 22,  0, 3, 0, 0, 0, 23},
+
+};
+
+/**
+ * struct dfs_bin5pulse ar9300_bin5pulses - BIN5 pulse for AR9300 chipset.
+ */
+struct dfs_bin5pulse ar9300_bin5pulses[] = {
+	{2, 28, 105, 12, 22, 5},
+};
+
+/**
+ * struct dfs_pulse ar9300_korea_radars - DFS pulses for KOREA domain.
+ */
+struct dfs_pulse ar9300_korea_radars[] = {
+	/* Korea Type 1 */
+	{18,  1,  700, 700,  0, 6,  5,  0,  1, 18,  0, 3,  1, 0, 0, 40},
+	/* Korea Type 2 */
+	{10,  1, 1800, 1800, 0, 6,  4,  0,  1, 18,  0, 3,  1, 0, 0, 41},
+	/* Korea Type 3 */
+	{70,  1,  330, 330,  0, 6, 20,  0,  2, 18,  0, 3,  1, 0, 0, 42},
+	/* Korea Type 4 */
+	{3,   1, 3003, 3003, 1, 7,  2,  0,  1, 18,  0, 0, 1,  0, 0, 43},
+};
+
+void dfs_get_radars_for_ar9300(struct wlan_dfs *dfs)
+{
+	struct wlan_dfs_radar_tab_info rinfo;
+	int dfsdomain = DFS_FCC_DOMAIN;
+
+	qdf_mem_zero(&rinfo, sizeof(rinfo));
+	dfsdomain = utils_get_dfsdomain(dfs->dfs_pdev_obj);
+
+	switch (dfsdomain) {
+	case DFS_FCC_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_FCC_DOMAIN_9300");
+		rinfo.dfsdomain = DFS_FCC_DOMAIN;
+		rinfo.dfs_radars =
+			&ar9300_fcc_radars[AR9300_FCC_RADARS_FCC_OFFSET];
+		rinfo.numradars =
+			(QDF_ARRAY_SIZE(ar9300_fcc_radars) -
+			 AR9300_FCC_RADARS_FCC_OFFSET);
+		rinfo.b5pulses = &ar9300_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar9300_bin5pulses);
+		break;
+	case DFS_ETSI_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_ETSI_DOMAIN_9300");
+		rinfo.dfsdomain = DFS_ETSI_DOMAIN;
+
+		if (dfs_is_en302_502_applicable(dfs)) {
+			rinfo.dfs_radars = ar9300_etsi_radars;
+			rinfo.numradars = QDF_ARRAY_SIZE(ar9300_etsi_radars);
+		} else {
+			uint8_t offset = ETSI_LEGACY_PULSE_ARR_OFFSET;
+
+			rinfo.dfs_radars = &ar9300_etsi_radars[offset];
+			rinfo.numradars =
+				QDF_ARRAY_SIZE(ar9300_etsi_radars) - offset;
+		}
+
+		rinfo.b5pulses = &ar9300_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar9300_bin5pulses);
+		break;
+	case DFS_KR_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS,
+				"DFS_ETSI_DOMAIN_9300_Country_Korea");
+		rinfo.dfsdomain = DFS_ETSI_DOMAIN;
+		rinfo.dfs_radars = &ar9300_korea_radars[0];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar9300_korea_radars);
+		rinfo.b5pulses = &ar9300_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar9300_bin5pulses);
+		break;
+	case DFS_MKK4_DOMAIN:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "DFS_MKK4_DOMAIN_9300");
+		rinfo.dfsdomain = DFS_MKK4_DOMAIN;
+		rinfo.dfs_radars = &ar9300_fcc_radars[0];
+		rinfo.numradars = QDF_ARRAY_SIZE(ar9300_fcc_radars);
+		rinfo.b5pulses = &ar9300_bin5pulses[0];
+		rinfo.numb5radars = QDF_ARRAY_SIZE(ar9300_bin5pulses);
+		break;
+	default:
+		dfs_info(dfs, WLAN_DEBUG_DFS_ALWAYS, "no domain");
+		return;
+	}
+
+	lmac_set_use_cac_prssi(dfs->dfs_pdev_obj);
+
+	rinfo.dfs_defaultparams.pe_firpwr = AR9300_DFS_FIRPWR;
+	rinfo.dfs_defaultparams.pe_rrssi = AR9300_DFS_RRSSI;
+	rinfo.dfs_defaultparams.pe_height = AR9300_DFS_HEIGHT;
+	rinfo.dfs_defaultparams.pe_prssi = AR9300_DFS_PRSSI;
+
+	/*
+	 * We have an issue with PRSSI.
+	 * For normal operation we use AR9300_DFS_PRSSI, which is set to 6.
+	 * Please refer to EV91563, 94164.
+	 * However, this causes problem during CAC as no radar is detected
+	 * during that period with PRSSI=6. Only PRSSI= 10 seems to fix this.
+	 * We use this flag to keep track of change in PRSSI.
+	 */
+	rinfo.dfs_defaultparams.pe_inband = AR9300_DFS_INBAND;
+	rinfo.dfs_defaultparams.pe_relpwr = AR9300_DFS_RELPWR;
+	rinfo.dfs_defaultparams.pe_relstep = AR9300_DFS_RELSTEP;
+	rinfo.dfs_defaultparams.pe_maxlen = AR9300_DFS_MAXLEN;
+
+	dfs_init_radar_filters(dfs, &rinfo);
+}

+ 107 - 0
direct_attach/umac/dfs/core/src/filtering/dfs_direct_attach_radar.c

@@ -0,0 +1,107 @@
+/*
+ * Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
+ * Copyright (c) 2011, Atheros Communications Inc.
+ *
+ * Permission to use, copy, modify, and/or distribute this software for any
+ * purpose with or without fee is hereby granted, provided that the above
+ * copyright notice and this permission notice appear in all copies.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
+ */
+
+/**
+ * DOC: This file has radar table and initialization function for Beeliner
+ * family of chipsets.
+ */
+
+#include "dfs.h"
+#include "wlan_dfs_mlme_api.h"
+#include "wlan_dfs_utils_api.h"
+#include "wlan_dfs_lmac_api.h"
+#include "dfs_internal.h"
+
+void dfs_get_da_radars(struct wlan_dfs *dfs)
+{
+#define AR5212_DEVID_IBM            0x1014 /* IBM minipci ID */
+#define AR5212_AR2413               0x001a /* AR2413 aka Griffin-lite */
+#define AR5212_AR2413               0x001a /* AR2413 aka Griffin-lite */
+#define AR5212_AR5413               0x001b /* Eagle */
+#define AR5212_AR5424               0x001c /* Condor (PCI express) */
+#define AR5212_DEVID_FF19           0xff19 /* PCI express */
+#define AR5212_AR2417               0x001d /* Nala, PCI */
+#define AR5212_DEVID                0x0013 /* Final ar5212 devid */
+#define AR5212_FPGA                 0xf013 /* Emulation board */
+#define AR5212_DEFAULT              0x1113 /* No eeprom HW default */
+
+#define AR5416_DEVID_PCI            0x0023 /* AR5416 PCI (CB/MB) (Owl)*/
+#define AR5416_DEVID_PCIE           0x0024 /* AR5416 PCI-E (XB) (Owl) */
+#define AR5416_DEVID_AR9160_PCI     0x0027 /* AR9160 PCI (Sowl) */
+#define AR5416_AR9100_DEVID         0x000b /* AR9100 (Howl)    */
+#define AR5416_DEVID_AR9280_PCI     0x0029 /* PCI (Merlin) */
+#define AR5416_DEVID_AR9280_PCIE    0x002a /* PCIE (Merlin) */
+#define AR5416_DEVID_AR9285_PCIE    0x002b /* PCIE (Kite) */
+#define AR5416_DEVID_AR9285G_PCIE   0x002c /* PCIE (Kite G only) */
+#define AR5416_DEVID_AR9287_PCI     0x002d /* PCI (Kiwi) */
+#define AR5416_DEVID_AR9287_PCIE    0x002e /* PCIE (Kiwi) */
+
+#define AR9300_DEVID_AR9380_PCIE    0x0030 /* PCIE (Osprey) */
+#define AR9300_DEVID_AR9340         0x0031 /* Wasp */
+#define AR9300_DEVID_AR9485_PCIE    0x0032 /* Poseidon */
+#define AR9300_DEVID_AR9580_PCIE    0x0033 /* Peacock */
+#define AR9300_DEVID_AR1111_PCIE    0x0037 /* AR1111 */
+#define AR9300_DEVID_AR946X_PCIE    0x0034 /* Jupiter: 2x2 DB + BT - AR9462 */
+#define AR9300_DEVID_AR955X         0x0039 /* Scorpion */
+#define AR9300_DEVID_AR953X         0x003d /* Honey Bee */
+#define AR9300_DEVID_AR956X         0x003f /* Dragonfly */
+#define AR9300_DEVID_AR956X_PCIE    0x0036 /* Aphrodite: 1x1 DB + BT - AR9564 */
+#define AR9300_DEVID_EMU_PCIE       0xabcd
+
+	uint16_t devid = lmac_get_ah_devid(dfs->dfs_pdev_obj);
+	/* For DA */
+
+	switch (devid) {
+	case AR5212_DEVID_IBM:
+	case AR5212_AR2413:
+	case AR5212_AR5413:
+	case AR5212_AR5424:
+	case AR5212_DEVID_FF19:
+		devid = AR5212_DEVID;
+	case AR5212_AR2417:
+	case AR5212_DEVID:
+	case AR5212_FPGA:
+	case AR5212_DEFAULT:
+		dfs_get_radars_for_ar5212(dfs);
+		break;
+	case AR5416_DEVID_PCI:
+	case AR5416_DEVID_PCIE:
+	case AR5416_DEVID_AR9160_PCI:
+	case AR5416_AR9100_DEVID:
+	case AR5416_DEVID_AR9280_PCI:
+	case AR5416_DEVID_AR9280_PCIE:
+	case AR5416_DEVID_AR9285_PCIE:
+	case AR5416_DEVID_AR9285G_PCIE:
+	case AR5416_DEVID_AR9287_PCI:
+	case AR5416_DEVID_AR9287_PCIE:
+		dfs_get_radars_for_ar5416(dfs);
+		break;
+	case AR9300_DEVID_AR9380_PCIE:
+	case AR9300_DEVID_AR9340:
+	case AR9300_DEVID_AR9485_PCIE:
+	case AR9300_DEVID_AR9580_PCIE:
+	case AR9300_DEVID_AR1111_PCIE:
+	case AR9300_DEVID_AR946X_PCIE:
+	case AR9300_DEVID_AR955X:
+	case AR9300_DEVID_AR953X:
+	case AR9300_DEVID_AR956X:
+	case AR9300_DEVID_AR956X_PCIE:
+	case AR9300_DEVID_EMU_PCIE:
+		dfs_get_radars_for_ar9300(dfs);
+		break;
+	}
+}