disp: msm: sde: enable dsc full ICH error precision

This feature enables using all available bits when ICH
error calculations are made. This improves precision and
image quality when there are more than 8 bits per component.

Change-Id: I851f05418283d0e731332d4069e3b6e57487b9a3
Signed-off-by: Nilaan Gunabalachandran <quic_ngunabal@quicinc.com>

msm/sde/sde_hw_catalog.c

@@ -3208,6 +3208,8 @@ static int sde_dsc_parse_dt(struct device_node *np,
 						&dsc->features);
 			if (SDE_HW_MAJOR(sde_cfg->hw_rev) >= SDE_HW_MAJOR(SDE_HW_VER_900))
 				set_bit(SDE_DSC_4HS, &dsc->features);
+			if (SDE_HW_MAJOR(sde_cfg->hw_rev) >= SDE_HW_MAJOR(SDE_HW_VER_A00))
+				set_bit(SDE_DSC_FULL_ICH_PREC, &dsc->features);
 			if (sde_cfg->has_reduced_ob_max)
 				set_bit(SDE_DSC_REDUCED_OB_MAX, &dsc->features);
 		} else {

msm/sde/sde_hw_catalog.h

@@ -511,6 +511,7 @@ enum {
  * @SDE_DSC_ENC,                DSC encoder sub block
  * @SDE_DSC_CTL,                DSC ctl sub block
  * @SDE_DSC_4HS,                Dedicated DSC 4HS config registers
+ * @SDE_DSC_FULL_ICH_PREC,      DSC use full ICH error precision
  * @SDE_DSC_MAX
  */
 enum {
@@ -522,6 +523,7 @@ enum {
 	SDE_DSC_ENC,
 	SDE_DSC_CTL,
 	SDE_DSC_4HS,
+	SDE_DSC_FULL_ICH_PREC,
 	SDE_DSC_MAX
 };
 

msm/sde/sde_hw_dsc_1_2.c

@@ -188,6 +188,10 @@ static void sde_hw_dsc_config(struct sde_hw_dsc *hw_dsc,
 		data |= 0xC00; // set bit 10 and 11
 	data |= (_dsc_calc_ob_max_addr(hw_dsc, dsc->num_active_ss_per_enc) << 18);
 
+	if (test_bit(SDE_DSC_FULL_ICH_PREC, &hw_dsc->caps->features) &&
+			dsc->config.bits_per_component > 8)
+		data |= BIT(12);
+
 	SDE_REG_WRITE(dsc_c, ENC_DF_CTRL + idx, data);
 
 	data = (dsc->config.dsc_version_minor & 0xf) << 28;