qcacmn: Print Rx Decrypt error statistics
Add support to print Rx Decrypt errors as part of DP statistics Change-Id: I03f485003dd1e0d95db21cb25b2973fa26838982 CRs-Fixed: 2004658
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@@ -2863,6 +2863,9 @@ dp_print_soc_rx_stats(struct dp_soc *soc)
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DP_TRACE_STATS(FATAL, "SOC Rx Stats:\n");
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DP_TRACE_STATS(FATAL, "SOC Rx Stats:\n");
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DP_TRACE_STATS(FATAL, "Errors:\n");
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DP_TRACE_STATS(FATAL, "Errors:\n");
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DP_TRACE_STATS(FATAL, "Rx Decrypt Errors = %d",
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(soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_DECRYPT] +
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soc->stats.rx.err.rxdma_error[HAL_RXDMA_ERR_TKIP_MIC]));
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DP_TRACE_STATS(FATAL, "Invalid RBM = %d",
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DP_TRACE_STATS(FATAL, "Invalid RBM = %d",
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soc->stats.rx.err.invalid_rbm);
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soc->stats.rx.err.invalid_rbm);
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DP_TRACE_STATS(FATAL, "Invalid Vdev = %d",
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DP_TRACE_STATS(FATAL, "Invalid Vdev = %d",
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@@ -2873,6 +2876,7 @@ dp_print_soc_rx_stats(struct dp_soc *soc)
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soc->stats.rx.err.rx_invalid_peer.num);
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soc->stats.rx.err.rx_invalid_peer.num);
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DP_TRACE_STATS(FATAL, "HAL Ring Access Fail = %d",
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DP_TRACE_STATS(FATAL, "HAL Ring Access Fail = %d",
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soc->stats.rx.err.hal_ring_access_fail);
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soc->stats.rx.err.hal_ring_access_fail);
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for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
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for (i = 0; i < MAX_RXDMA_ERRORS; i++) {
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index += qdf_snprint(&rxdma_error[index],
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index += qdf_snprint(&rxdma_error[index],
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DP_RXDMA_ERR_LENGTH - index,
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DP_RXDMA_ERR_LENGTH - index,
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@@ -1684,6 +1684,47 @@ enum hal_reo_error_code {
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HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET
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HAL_REO_ERR_QUEUE_DESC_BLOCKED_SET
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};
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};
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/**
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* enum hal_rxdma_error_code: Code describing the type of RxDMA error detected
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*
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* @HAL_RXDMA_ERR_OVERFLOW: MPDU frame is not complete due to a FIFO overflow
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* @ HAL_RXDMA_ERR_OVERFLOW : MPDU frame is not complete due to a FIFO
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* overflow
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* @ HAL_RXDMA_ERR_MPDU_LENGTH : MPDU frame is not complete due to receiving
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* incomplete
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* MPDU from the PHY
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* @ HAL_RXDMA_ERR_FCS : FCS check on the MPDU frame failed
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* @ HAL_RXDMA_ERR_DECRYPT : Decryption error
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* @ HAL_RXDMA_ERR_TKIP_MIC : TKIP MIC error
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* @ HAL_RXDMA_ERR_UNECRYPTED : Received a frame that was expected to be
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* encrypted but wasn’t
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* @ HAL_RXDMA_ERR_MSDU_LEN : MSDU related length error
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* @ HAL_RXDMA_ERR_MSDU_LIMIT : Number of MSDUs in the MPDUs exceeded
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* the max allowed
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* @ HAL_RXDMA_ERR_WIFI_PARSE : wifi parsing error
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* @ HAL_RXDMA_ERR_AMSDU_PARSE : Amsdu parsing error
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* @ HAL_RXDMA_ERR_SA_TIMEOUT : Source Address search timeout
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* @ HAL_RXDMA_ERR_DA_TIMEOUT : Destination Address search timeout
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* @ HAL_RXDMA_ERR_FLOW_TIMEOUT : Flow Search Timeout
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* @ HAL_RXDMA_ERR_FLUSH_REQUEST : RxDMA FIFO Flush request
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*/
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enum hal_rxdma_error_code {
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HAL_RXDMA_ERR_OVERFLOW = 0,
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HAL_RXDMA_ERR_MPDU_LENGTH,
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HAL_RXDMA_ERR_FCS,
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HAL_RXDMA_ERR_DECRYPT,
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HAL_RXDMA_ERR_TKIP_MIC,
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HAL_RXDMA_ERR_UNECRYPTED,
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HAL_RXDMA_ERR_MSDU_LEN,
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HAL_RXDMA_ERR_MSDU_LIMIT,
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HAL_RXDMA_ERR_WIFI_PARSE,
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HAL_RXDMA_ERR_AMSDU_PARSE,
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HAL_RXDMA_ERR_SA_TIMEOUT,
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HAL_RXDMA_ERR_DA_TIMEOUT,
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HAL_RXDMA_ERR_FLOW_TIMEOUT,
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HAL_RXDMA_ERR_FLUSH_REQUEST
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};
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#define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *) reo_desc)+ \
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#define HAL_RX_REO_ERROR_GET(reo_desc) (((*(((uint32_t *) reo_desc)+ \
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(REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \
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(REO_DESTINATION_RING_7_REO_ERROR_CODE_OFFSET >> 2))) & \
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REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \
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REO_DESTINATION_RING_7_REO_ERROR_CODE_MASK) >> \
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