video: driver: fix __set_clk_rate for upstream

In downstream, driver vote for VIDEO_CC_MVS0_CLK_SRC which
needs a multiplication factor of 3 to be applied to
required freq while on upstream we vote for branch clk
i.e. VIDEO_CC_MVS0_CLK hence this multiplication factor is
not needed.

Change-Id: I43131558b3882da303cfaa9bdb5d76080a83fc42
Signed-off-by: Dikshita Agarwal <[email protected]>

driver/platform/waipio/src/waipio.c

@@ -1680,7 +1680,7 @@ static const char * const waipio_opp_table[] = { "mx", "mmcx", NULL };
 /* name, clock id, scaling */
 static const struct clk_table waipio_clk_table[] = {
 	{ "gcc_video_axi0",         GCC_VIDEO_AXI0_CLK,     0 },
-	{ "core_clk",               VIDEO_CC_MVS0C_CLK,     1 },
+	{ "core_clk",               VIDEO_CC_MVS0C_CLK,     0 },
 	{ "vcodec_clk",             VIDEO_CC_MVS0_CLK,      1 },
 };
 
@@ -1698,7 +1698,7 @@ const struct context_bank_table waipio_context_bank_table[] = {
 
 /* freq */
 static struct freq_table waipio_freq_table[] = {
-	{444000000}, {366000000}, {338000000}, {239999999}
+	{444000000}, {366000000}, {338000000}, {240000000}
 };
 
 /* register, value, mask */

driver/vidc/src/resources.c

@@ -1328,7 +1328,6 @@ static int update_residency_stats(
 static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl,
 			  u64 rate)
 {
-	u64 srate;
 	int rc = 0;
 
 	/* not registered */
@@ -1340,25 +1339,17 @@ static int __set_clk_rate(struct msm_vidc_core *core, struct clock_info *cl,
 	/* update clock residency stats */
 	update_residency_stats(core, cl, rate);
 
-	/*
-	 * This conversion is necessary since we are scaling clock values based on
-	 * the branch clock. However, mmrm driver expects source clock to be registered
-	 * and used for scaling.
-	 * TODO: Remove this scaling if using source clock instead of branch clock.
-	 */
-	srate = rate * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO;
-
 	/* bail early if requested clk rate is not changed */
 	if (rate == cl->prev)
 		return 0;
 
 	d_vpr_p("Scaling clock %s to %llu, prev %llu\n",
-		cl->name, srate, cl->prev * MSM_VIDC_CLOCK_SOURCE_SCALING_RATIO);
+		cl->name, rate, cl->prev);
 
-	rc = clk_set_rate(cl->clk, srate);
+	rc = clk_set_rate(cl->clk, rate);
 	if (rc) {
 		d_vpr_e("%s: Failed to set clock rate %llu %s: %d\n",
-			__func__, srate, cl->name, rc);
+			__func__, rate, cl->name, rc);
 		return rc;
 	}