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video: driver: add heic 10bit image encoding support

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- fix 10bit internal buffer allocation handling
- profile: MAIN_10
- pixfmt: linear 10bit(MSM_VIDC_FMT_P010).

Change-Id: I49ffd221927e5eb59915405ff62c038ae05b84f3
Signed-off-by: Govindaraj Rajagopal <grajagop@codeaurora.org>
This commit is contained in:
Govindaraj Rajagopal
2021-03-22 18:12:01 +05:30
parent d238d03c1b
commit c148cf0bb5
2 changed files with 25 additions and 36 deletions
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20
driver/platform/waipio/src/msm_vidc_waipio.c
View File

@@ -113,7 +113,7 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
MSM_VIDC_FMT_NV12C,
MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C,
MSM_VIDC_FMT_NV12C},
{PIX_FMTS, ENC, HEVC|HEIC,
{PIX_FMTS, ENC, HEVC,
MSM_VIDC_FMT_NV12,
MSM_VIDC_FMT_TP10C,
MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_NV12C |
@@ -1198,15 +1198,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
V4L2_CID_MIN_BUFFERS_FOR_CAPTURE,
HFI_PROP_BUFFER_FW_MIN_OUTPUT_COUNT,
CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT},
{PIX_FMTS, ENC, HEIC,
MSM_VIDC_FMT_NV12,
MSM_VIDC_FMT_P010,
MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_NV21 | MSM_VIDC_FMT_P010,
MSM_VIDC_FMT_NV12,
0, 0,
CAP_FLAG_ROOT,
{0},
{PROFILE}},
{MBPF, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256) */
{MBPF, DEC, HEIC, 36, 1048576, 1, 1048576}, /* ((16384x16384)/256) */
{MBPS, ENC, HEIC, 64, 262144, 262144}, /* ((8192x8192)/256)@1fps */
@@ -1260,6 +1251,15 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
CAP_FLAG_ROOT | CAP_FLAG_OUTPUT_PORT,
{0}, {0},
NULL, msm_vidc_set_u32},
{PIX_FMTS, ENC, HEIC,
MSM_VIDC_FMT_NV12,
MSM_VIDC_FMT_P010,
MSM_VIDC_FMT_NV12 | MSM_VIDC_FMT_P010,
MSM_VIDC_FMT_NV12,
0, 0,
CAP_FLAG_ROOT,
{0},
{PROFILE}},
{PROFILE, ENC|DEC, HEIC,
V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_STILL_PICTURE,
V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN_10,

41
driver/variant/iris2/src/msm_vidc_buffer_iris2.c
View File

@@ -365,7 +365,7 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst)
{
struct msm_vidc_core *core;
u32 size = 0;
u32 width, height, pixelformat, num_vpp_pipes;
u32 width, height, pixfmt, num_vpp_pipes;
bool is_tenbit = false;
struct v4l2_format *f;
@@ -374,21 +374,17 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst)
return size;
}
core = inst->core;
if (!core->capabilities) {
i_vpr_e(inst, "%s: invalid core capabilities\n", __func__);
if (!core->capabilities || !inst->capabilities) {
i_vpr_e(inst, "%s: invalid capabilities\n", __func__);
return size;
}
num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value;
pixfmt = inst->capabilities->cap[PIX_FMTS].value;
f = &inst->fmts[OUTPUT_PORT];
width = f->fmt.pix_mp.width;
height = f->fmt.pix_mp.height;
pixelformat = f->fmt.pix_mp.pixelformat;
if (pixelformat == MSM_VIDC_FMT_P010 ||
pixelformat == MSM_VIDC_FMT_TP10C)
is_tenbit = true;
else
is_tenbit = false;
is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C);
if (inst->codec == MSM_VIDC_H264)
HFI_BUFFER_LINE_H264E(size, width, height, is_tenbit, num_vpp_pipes);
@@ -402,11 +398,11 @@ static u32 msm_vidc_encoder_line_size_iris2(struct msm_vidc_inst *inst)
static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst)
{
u32 size = 0;
u32 width, height, pixelformat;
u32 width, height, pixfmt;
struct v4l2_format *f;
bool is_tenbit;
if (!inst || !inst->core) {
if (!inst || !inst->core || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return 0;
}
@@ -414,12 +410,9 @@ static u32 msm_vidc_encoder_dpb_size_iris2(struct msm_vidc_inst *inst)
f = &inst->fmts[OUTPUT_PORT];
width = f->fmt.pix_mp.width;
height = f->fmt.pix_mp.height;
pixelformat = f->fmt.pix_mp.pixelformat;
if (pixelformat == MSM_VIDC_FMT_P010 ||
pixelformat == MSM_VIDC_FMT_TP10C)
is_tenbit = true;
else
is_tenbit = false;
pixfmt = inst->capabilities->cap[PIX_FMTS].value;
is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C);
if (inst->codec == MSM_VIDC_H264)
HFI_BUFFER_DPB_H264E(size, width, height);
@@ -448,27 +441,23 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst)
{
u32 size = 0;
bool ds_enable, rot_enable, flip_enable, is_tenbit;
u32 width, height, pixelformat;
u32 width, height, pixfmt;
struct v4l2_format* f;
if (!inst || !inst->core) {
if (!inst || !inst->core || !inst->capabilities) {
d_vpr_e("%s: invalid params\n", __func__);
return 0;
}
ds_enable = false; // TODO: fixme
rot_enable = false; // TODO: fixme
flip_enable = false; // TODO: fixme
is_tenbit = false;
f = &inst->fmts[OUTPUT_PORT];
width = f->fmt.pix_mp.width;
height = f->fmt.pix_mp.height;
pixelformat = f->fmt.pix_mp.pixelformat;
if (pixelformat == MSM_VIDC_FMT_P010 ||
pixelformat == MSM_VIDC_FMT_TP10C)
is_tenbit = true;
else
is_tenbit = false;
pixfmt = inst->capabilities->cap[PIX_FMTS].value;
is_tenbit = (pixfmt == MSM_VIDC_FMT_P010 || pixfmt == MSM_VIDC_FMT_TP10C);
HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable,
rot_enable, flip_enable, is_tenbit);