Merge "soc: soundwire: support 600KHz bus clock scaling"

asoc/lahaina-port-config.h

@@ -65,9 +65,16 @@ static struct port_params tx_frame_params_4p8MHz[SWR_MSTR_PORT_LEN] = {
 	{3,  2,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
 };
 
+/* 0.6 MHz clock */
+static struct port_params tx_frame_params_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
+};
 static struct swr_mstr_port_map sm_port_map[] = {
 	{TX_MACRO, SWR_UC0, tx_frame_params_default},
 	{TX_MACRO, SWR_UC1, tx_frame_params_4p8MHz},
+	{TX_MACRO, SWR_UC2, tx_frame_params_0p6MHz},
 	{RX_MACRO, SWR_UC0, rx_frame_params_default},
 	{RX_MACRO, SWR_UC1, rx_frame_params_dsd},
 	{WSA_MACRO, SWR_UC0, wsa_frame_params_default},

include/soc/swr-common.h

@@ -13,6 +13,7 @@
 enum {
 	SWR_UC0 = 0,
 	SWR_UC1,
+	SWR_UC2,
 	SWR_UC_MAX,
 };
 

soc/swr-mstr-ctrl.c

@@ -755,6 +755,8 @@ static int swrm_get_port_config(struct swr_mstr_ctrl *swrm)
 
 	if (swrm->bus_clk == SWR_CLK_RATE_4P8MHZ)
 		usecase = 1;
+	else if (swrm->bus_clk == SWR_CLK_RATE_0P6MHZ)
+		usecase = 2;
 
 	params = swrm->port_param[usecase];
 	copy_port_tables(swrm, params);
@@ -1366,11 +1368,14 @@ static void swrm_get_device_frame_shape(struct swr_mstr_ctrl *swrm,
 
 	if ((swrm->master_id == MASTER_ID_TX) &&
 		((swrm->bus_clk == SWR_CLK_RATE_9P6MHZ) ||
+		 (swrm->bus_clk == SWR_CLK_RATE_0P6MHZ) ||
 		 (swrm->bus_clk == SWR_CLK_RATE_4P8MHZ))) {
 		dev_num = swrm_get_device_id(swrm, port_req->dev_num);
 		port_id = port_req->slave_port_id;
 		if (swrm->bus_clk == SWR_CLK_RATE_9P6MHZ)
 			pp_dev = swrdev_frame_params_9p6MHz[dev_num].pp;
+		else if (swrm->bus_clk == SWR_CLK_RATE_0P6MHZ)
+			pp_dev = swrdev_frame_params_0p6MHz[dev_num].pp;
 		else
 			pp_dev = swrdev_frame_params_4p8MHz[dev_num].pp;
 		pp_port = &pp_dev[port_id];

soc/swr-slave-port-config.h

@@ -38,6 +38,14 @@ static struct port_params tx_wcd_4p8MHz[SWR_MSTR_PORT_LEN] = {
 	{3,  2,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
 };
 
+/* AMIC 0.6 MHz clock, single channel */
+static struct port_params tx_wcd_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX4 */
+};
+
 /* 4 Channel configuration */
 /* SWR DMIC0 */
 static struct port_params tx_bottom_mic_9p6MHz[SWR_MSTR_PORT_LEN] = {
@@ -88,6 +96,31 @@ static struct port_params tx_top_mic_4p8MHz[SWR_MSTR_PORT_LEN] = {
 	{3,  2,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
 };
 
+/* 1 Channel configuration */
+/* SWR DMIC0 */
+static struct port_params tx_bottom_mic_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{3,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+};
+
+/* SWR DMIC1 */
+static struct port_params tx_receiver_mic_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{3,  2,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+};
+
+/* SWR DMIC2 */
+static struct port_params tx_back_mic_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{3,  2,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+};
+
+/* SWR DMIC3 */
+static struct port_params tx_top_mic_0p6MHz[SWR_MSTR_PORT_LEN] = {
+	{3,  3,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
+	{1,  1,  0,  0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
+};
+
 struct swr_dev_frame_config {
 	struct port_params *pp;
 };
@@ -110,4 +143,13 @@ static struct swr_dev_frame_config swrdev_frame_params_4p8MHz[] = {
 	{tx_bottom_mic_4p8MHz},
 };
 
+static struct swr_dev_frame_config swrdev_frame_params_0p6MHz[] = {
+	{tx_dummy},
+	{tx_wcd_0p6MHz},
+	{tx_top_mic_0p6MHz},
+	{tx_back_mic_0p6MHz},
+	{tx_receiver_mic_0p6MHz},
+	{tx_bottom_mic_0p6MHz},
+};
+
 #endif /* _LAHAINA_PORT_CONFIG */