samsung-sm8650/android_kernel_samsung_sm8650-modules
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

disp: msm: sde: increase rsc min_threshold time

Browse Source 
Increase the rsc min_threshold time, so that it has
sufficient time to complete the sequencer in rare
cases. Increase the polling time for tcs ok
from 1us to 3us to align with the min_threshold.

Change-Id: I8ebe250823969e55ec2ec4bb9f8f55bf4aa52aa5
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
This commit is contained in:
Veera Sundaram Sankaran
2019-09-13 11:56:59 -07:00
parent 8babba1d11
commit bfd98d4d37
2 changed files with 11 additions and 5 deletions
Download Patch File Download Diff File Expand all files Collapse all files

7
msm/sde_rsc.c
View File

@@ -37,10 +37,11 @@
/** /**
* rsc_min_threshold will be set to MIN_THRESHOLD_OVERHEAD_TIME which * rsc_min_threshold will be set to MIN_THRESHOLD_OVERHEAD_TIME which
* takes into account back off time + overhead from RSC/RSC_WRAPPER. The * takes into account back off time + overhead from RSC/RSC_WRAPPER. The
* overhead buffer time is required to be greater than 14. For measure, * overhead buffer time is required to be greater than 14. Program it
* this value assumes 18. * with a higher value (3.3 ms), so it has sufficient time to complete
* the sequence in rare cases.
*/ */
#define MIN_THRESHOLD_OVERHEAD_TIME 18 #define MIN_THRESHOLD_OVERHEAD_TIME 64
#define DEFAULT_PANEL_FPS 60 #define DEFAULT_PANEL_FPS 60
#define DEFAULT_PANEL_JITTER_NUMERATOR 2 #define DEFAULT_PANEL_JITTER_NUMERATOR 2

9
msm/sde_rsc_hw.c
View File

@@ -872,14 +872,19 @@ int rsc_hw_tcs_wait(struct sde_rsc_priv *rsc)
} }
/* check for sequence running status before exiting */ /* check for sequence running status before exiting */
for (count = MAX_CHECK_LOOPS; count > 0; count--) { for (count = (MAX_CHECK_LOOPS / 4); count > 0; count--) {
seq_status = dss_reg_r(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL, seq_status = dss_reg_r(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
rsc->debug_mode) & BIT(1); rsc->debug_mode) & BIT(1);
if (!seq_status) { if (!seq_status) {
rc = 0; rc = 0;
break; break;
} }
usleep_range(1, 2);
dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
0x1, rsc->debug_mode);
usleep_range(3, 4);
dss_reg_w(&rsc->wrapper_io, SDE_RSCC_WRAPPER_CTRL,
0x0, rsc->debug_mode);
} }
return rc; return rc;