qcacmn: Reinitialize pci irq ops for qcn9100

QCN9100 pci radio is connected to the IPQ5018 through PCI slots
and enumerated by the Q6 radio. From the host driver perspective,
QCN9100 is treated as an AHB device, however the QCN9100 uses
MSI interrupts to notify events
-Reinitialize pci irq ops for hybrid bus type device qcn9100
-Update CE flags of qcn9100 to interrupt mode
-Set disable_wake_irq flag for qcn9100 as wake irq is not used

Change-Id: I8da7f0b48923b9d70e62f4ff181bd47865ea2fe8

hif/src/ce/ce_assignment.h

@@ -934,27 +934,27 @@ static struct CE_pipe_config target_ce_config_wlan_adrastea[] = {
 #define QCN_9100_CE_COUNT 6
 static struct CE_attr host_ce_config_wlan_qcn9100[] = {
 	/* host->target HTC control and raw streams */
-	{/*CE0*/ (EPPING_CE_FLAGS_POLL), 0, 16, 2048, 0, NULL,},
+	{/*CE0*/ (CE_ATTR_FLAGS), 0, 16, 2048, 0, NULL,},
 	/* target->host HTT + HTC control */
-	{/*CE1*/ (EPPING_CE_FLAGS_POLL), 0, 0,  2048,
+	{/*CE1*/ (CE_ATTR_FLAGS), 0, 0,  2048,
 		512, NULL,},
 	/* target->host WMI */
-	{/*CE2*/ (EPPING_CE_FLAGS_POLL), 0, 0,  2048,
+	{/*CE2*/ (CE_ATTR_FLAGS), 0, 0,  2048,
 		128, NULL,},
 	/* host->target WMI */
-	{/*CE3*/ (EPPING_CE_FLAGS_POLL), 0, 32, 2048, 0, NULL,},
+	{/*CE3*/ (CE_ATTR_FLAGS), 0, 32, 2048, 0, NULL,},
 	/* host->target HTT */
-	{/*CE4*/ (EPPING_CE_FLAGS_POLL), 0,
+	{/*CE4*/ (CE_ATTR_FLAGS | CE_ATTR_DISABLE_INTR), 0,
 		CE_HTT_H2T_MSG_SRC_NENTRIES, 256, 0, NULL,},
 	/* target -> host PKTLOG */
-	{/*CE5*/ (EPPING_CE_FLAGS_POLL), 0, 0, 2048,
+	{/*CE5*/ (CE_ATTR_FLAGS), 0, 0, 2048,
 		512, NULL,},
 	/* Target autonomous HIF_memcpy */
-	{/*CE6*/ EPPING_CE_FLAGS_POLL, 0, 0, 0, 0, NULL,},
+	{/*CE6*/ CE_ATTR_FLAGS, 0, 0, 0, 0, NULL,},
 	/* host->target WMI (mac1) */
-	{/*CE7*/ EPPING_CE_FLAGS_POLL, 0, 0, 0, 0, NULL,},
+	{/*CE7*/ CE_ATTR_FLAGS, 0, 0, 0, 0, NULL,},
 	/* Reserved for target */
-	{/*CE8*/ EPPING_CE_FLAGS_POLL, 0, 0, 0, 0, NULL,},
+	{/*CE8*/ CE_ATTR_FLAGS, 0, 0, 0, 0, NULL,},
 	/* CE 9, 10, 11 belong to CoreBsp & MHI driver */
 };
 

hif/src/ce/ce_main.c

@@ -3312,6 +3312,7 @@ void hif_ce_prepare_config(struct hif_softc *scn)
 		hif_state->target_ce_config_sz =
 					sizeof(target_ce_config_wlan_qcn9100);
 		scn->ce_count = QCN_9100_CE_COUNT;
+		scn->disable_wake_irq = 1;
 		break;
 	case TARGET_TYPE_QCA5018:
 		hif_state->host_ce_config = host_ce_config_wlan_qca5018;

hif/src/dispatcher/multibus.h

@@ -110,6 +110,7 @@ static inline int hif_snoc_get_context_size(void)
 
 #ifdef HIF_PCI
 QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc);
+QDF_STATUS hif_update_irq_ops_with_pci(struct hif_softc *hif_sc);
 int hif_pci_get_context_size(void);
 #else
 static inline QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc)
@@ -117,6 +118,13 @@ static inline QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc)
 	hif_warn("not supported");
 	return QDF_STATUS_E_NOSUPPORT;
 }
+
+static inline
+QDF_STATUS hif_update_irq_ops_with_pci(struct hif_softc *hif_sc)
+{
+	HIF_ERROR("%s: not supported", __func__);
+	return QDF_STATUS_E_NOSUPPORT;
+}
 /**
  * hif_pci_get_context_size() - dummy when pci isn't supported
  *

hif/src/dispatcher/multibus_pci.c

@@ -94,6 +94,28 @@ QDF_STATUS hif_initialize_pci_ops(struct hif_softc *hif_sc)
 	return QDF_STATUS_SUCCESS;
 }
 
+/**
+ * hif_update_irq_ops_with_pci() - reinitialize the pci ops
+ * for hybrid bus type device qcn9100 ie.connected to pci slot
+ * but act as ahb bus device from host perspective
+ *
+ * @hif_sc: hif_softc to get bus ops
+ *
+ * Return: QDF_STATUS_SUCCESS
+ */
+QDF_STATUS hif_update_irq_ops_with_pci(struct hif_softc *hif_sc)
+{
+	struct hif_bus_ops *bus_ops = &hif_sc->bus_ops;
+
+	bus_ops->hif_grp_irq_configure = &hif_pci_configure_grp_irq;
+	bus_ops->hif_nointrs = &hif_pci_nointrs;
+	bus_ops->hif_irq_disable = &hif_pci_irq_disable;
+	bus_ops->hif_irq_enable = &hif_pci_irq_enable;
+	bus_ops->hif_disable_isr = &hif_pci_disable_isr;
+
+	return QDF_STATUS_SUCCESS;
+}
+
 /**
  * hif_pci_get_context_size() - return the size of the pci context
  *

hif/src/snoc/if_ahb.c

@@ -565,6 +565,7 @@ QDF_STATUS hif_ahb_enable_bus(struct hif_softc *ol_sc,
 
 	if (target_type == TARGET_TYPE_QCN9100) {
 		hif_ahb_get_soc_info_pld(sc, dev);
+		hif_update_irq_ops_with_pci(ol_sc);
 	} else {
 		status = pfrm_platform_get_resource(&pdev->dev,
 						    (struct qdf_pfm_hndl *)pdev,