asoc: bolero: check if clock is enabled before accessing register

Reset GFMUX reg for va-macro and wsa-macro when adsp is up
after SSR. And check if clock is enabled before accessing
register to avoid kernel panic.

Change-Id: Idce9695be552cab0e8e389cf72eeb7a67a754bf9
Signed-off-by: Meng Wang <[email protected]>

asoc/codecs/bolero/bolero-clk-rsc.c

@@ -238,17 +238,20 @@ static int bolero_clk_rsc_mux1_clk_request(struct bolero_clk_rsc *priv,
 		}
 		priv->clk_cnt[clk_id]--;
 		if (priv->clk_cnt[clk_id] == 0) {
-			bolero_clk_rsc_mux0_clk_request(priv, default_clk_id,
-							true);
+			ret = bolero_clk_rsc_mux0_clk_request(priv,
+						default_clk_id, true);
+
+			if (!ret)
+				iowrite32(0x0, clk_muxsel);
 
-			iowrite32(0x0, clk_muxsel);
 			if (priv->clk[clk_id + NPL_CLK_OFFSET])
 				clk_disable_unprepare(
 					priv->clk[clk_id + NPL_CLK_OFFSET]);
 			clk_disable_unprepare(priv->clk[clk_id]);
 
-			bolero_clk_rsc_mux0_clk_request(priv, default_clk_id,
-							false);
+			if (!ret)
+				bolero_clk_rsc_mux0_clk_request(priv,
+						default_clk_id, false);
 		}
 	}
 	return ret;

asoc/codecs/bolero/va-macro.c

@@ -209,6 +209,7 @@ static int va_macro_event_handler(struct snd_soc_component *component,
 	struct device *va_dev = NULL;
 	struct va_macro_priv *va_priv = NULL;
 	int retry_cnt = MAX_RETRY_ATTEMPTS;
+	int ret = 0;
 
 	if (!va_macro_get_data(component, &va_dev, &va_priv, __func__))
 		return -EINVAL;
@@ -234,6 +235,19 @@ static int va_macro_event_handler(struct snd_soc_component *component,
 				"%s: va_mclk_users is non-zero still, audio SSR fail!!\n",
 				__func__);
 		break;
+	case BOLERO_MACRO_EVT_SSR_UP:
+		/* enable&disable VA_CORE_CLK to reset GFMUX reg */
+		ret = bolero_clk_rsc_request_clock(va_priv->dev,
+						va_priv->default_clk_id,
+						VA_CORE_CLK, true);
+		if (ret < 0)
+			dev_err_ratelimited(va_priv->dev,
+				"%s, failed to enable clk, ret:%d\n",
+				__func__, ret);
+		else
+			bolero_clk_rsc_request_clock(va_priv->dev,
+						va_priv->default_clk_id,
+						VA_CORE_CLK, false);
 	case BOLERO_MACRO_EVT_CLK_RESET:
 		bolero_rsc_clk_reset(va_dev, VA_CORE_CLK);
 		break;

asoc/codecs/bolero/wsa-macro.c

@@ -905,6 +905,7 @@ static int wsa_macro_event_handler(struct snd_soc_component *component,
 {
 	struct device *wsa_dev = NULL;
 	struct wsa_macro_priv *wsa_priv = NULL;
+	int ret = 0;
 
 	if (!wsa_macro_get_data(component, &wsa_dev, &wsa_priv, __func__))
 		return -EINVAL;
@@ -923,6 +924,18 @@ static int wsa_macro_event_handler(struct snd_soc_component *component,
 	case BOLERO_MACRO_EVT_SSR_UP:
 		/* reset swr after ssr/pdr */
 		wsa_priv->reset_swr = true;
+		/* enable&disable WSA_CORE_CLK to reset GFMUX reg */
+		ret = bolero_clk_rsc_request_clock(wsa_priv->dev,
+						wsa_priv->default_clk_id,
+						WSA_CORE_CLK, true);
+		if (ret < 0)
+			dev_err_ratelimited(wsa_priv->dev,
+				"%s, failed to enable clk, ret:%d\n",
+				__func__, ret);
+		else
+			bolero_clk_rsc_request_clock(wsa_priv->dev,
+						wsa_priv->default_clk_id,
+						WSA_CORE_CLK, false);
 		if (wsa_priv->swr_ctrl_data)
 			swrm_wcd_notify(
 				wsa_priv->swr_ctrl_data[0].wsa_swr_pdev,