qcacmn: Unify Q_TARGET_ACCESS macros

Sleep state adjust has been added the the bus_ops table and the
macros using it can be unified.

Change-Id: Id08f5d95c295ab8419c0ae60519aae064c318856
CRs-Fixed: 986480

hif/src/hif_io32.h

@@ -36,6 +36,11 @@
 #define hif_write32_mb(addr, value) \
 	iowrite32((u32)(value), (void __iomem *)(addr))
 
+#define Q_TARGET_ACCESS_BEGIN(scn) \
+	hif_target_sleep_state_adjust(scn, false, true)
+#define Q_TARGET_ACCESS_END(scn) \
+	hif_target_sleep_state_adjust(scn, true, false)
+
 #ifdef HIF_PCI
 #include "hif_io32_pci.h"
 #endif

hif/src/pcie/hif_io32_pci.h

@@ -155,9 +155,6 @@ do { \
 		return; \
 } while (0)
 
-#define Q_TARGET_ACCESS_BEGIN(scn) \
-	hif_target_sleep_state_adjust(scn, false, true)
-
 #define A_TARGET_ACCESS_END_RET(scn)	\
 do { \
 	if (!WLAN_IS_EPPING_ENABLED(hif_get_conparam(scn)) && \
@@ -184,9 +181,6 @@ do { \
 		return; \
 } while (0)
 
-#define Q_TARGET_ACCESS_END(scn) \
-	hif_target_sleep_state_adjust(scn, true, false)
-
 #if CONFIG_ATH_PCIE_ACCESS_LIKELY
 #define A_TARGET_ACCESS_LIKELY(scn) \
 	hif_target_sleep_state_adjust(scn, false, false)

hif/src/snoc/hif_io32_snoc.h

@@ -58,9 +58,6 @@
 #define A_TARGET_ACCESS_BEGIN_RET_EXT(scn, val)
 #define A_TARGET_ACCESS_END_RET_EXT(scn, val)
 
-#define Q_TARGET_ACCESS_BEGIN(scn) 0
-#define Q_TARGET_ACCESS_END(scn) 0
-
 #define ADRASTEA_CE_INTR_ENABLES 0x002F00A8
 #define ADRASTEA_CE_INTR_ENABLES_SET "COMING IN REGISTER SET36"
 #define ADRASTEA_CE_INTR_ENABLES_CLEAR "COMING IN REGISTER SET36"