samsung-sm8650/android_kernel_samsung_sm8650-modules
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cnss2: Support disable pcie bw scalling from cnss2 side

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Add new "qcom,no-bwscale" under child device node to
indicate it want to disable bw scalling.

And the background is like HSP, it has stability issue
with some specific pcie cable with gen3, so it will
negotiate with RC side to change from gen3 to gen2
with MHI_ER_BW_SCALE_ELEMENT_TYPE event, which will
impact all the platform that want to keep use gen3.
So add this device tree config item to skip the link
speed negotiation.

Change-Id: I4a8d94a50dd740b84c3eeac435c5a19098b79ad9
CRs-Fixed: 3435289
This commit is contained in:
Chaoli Zhou
2023-04-06 17:52:44 +08:00
committed by Madan Koyyalamudi
parent 190e1efaa9
commit bd49da5f3e
3 changed files with 14 additions and 1 deletions
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6
cnss2/main.c
View File

@@ -274,6 +274,12 @@ cnss_get_pld_bus_ops_name(struct cnss_plat_data *plat_priv)
}
#endif
void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv)
{
plat_priv->no_bwscale = of_property_read_bool(plat_priv->dev_node,
"qcom,no-bwscale");
}
static inline int
cnss_get_rc_num(struct cnss_plat_data *plat_priv)
{

2
cnss2/main.h
View File

@@ -609,6 +609,7 @@ struct cnss_plat_data {
const char *pld_bus_ops_name;
u32 on_chip_pmic_devices_count;
u32 *on_chip_pmic_board_ids;
bool no_bwscale;
};
#if IS_ENABLED(CONFIG_ARCH_QCOM)
@@ -640,6 +641,7 @@ struct cnss_plat_data *cnss_get_plat_priv_by_rc_num(int rc_num);
int cnss_get_plat_env_count(void);
struct cnss_plat_data *cnss_get_plat_env(int index);
void cnss_get_qrtr_info(struct cnss_plat_data *plat_priv);
void cnss_get_bwscal_info(struct cnss_plat_data *plat_priv);
bool cnss_is_dual_wlan_enabled(void);
int cnss_driver_event_post(struct cnss_plat_data *plat_priv,
enum cnss_driver_event_type type,

7
cnss2/pci.c
View File

@@ -6389,8 +6389,13 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
if (cnss_pci_get_drv_supported(pci_priv))
cnss_mhi_controller_set_base(pci_priv, bar_start);
cnss_get_bwscal_info(plat_priv);
cnss_pr_dbg("no_bwscale: %d\n", plat_priv->no_bwscale);
/* BW scale CB needs to be set after registering MHI per requirement */
cnss_mhi_controller_set_bw_scale_cb(pci_priv, cnss_mhi_bw_scale);
if (!plat_priv->no_bwscale)
cnss_mhi_controller_set_bw_scale_cb(pci_priv,
cnss_mhi_bw_scale);
ret = cnss_pci_update_fw_name(pci_priv);
if (ret)