cnss2: Support disable pcie bw scalling from cnss2 side

Add new "qcom,no-bwscale" under child device node to
indicate it want to disable bw scalling.

And the background is like HSP, it has stability issue
with some specific pcie cable with gen3, so it will
negotiate with RC side to change from gen3 to gen2
with MHI_ER_BW_SCALE_ELEMENT_TYPE event, which will
impact all the platform that want to keep use gen3.
So add this device tree config item to skip the link
speed negotiation.

Change-Id: I4a8d94a50dd740b84c3eeac435c5a19098b79ad9
CRs-Fixed: 3435289
This commit is contained in:
Chaoli Zhou
2023-04-06 17:52:44 +08:00
committed by Madan Koyyalamudi
parent 190e1efaa9
commit bd49da5f3e
3 changed files with 14 additions and 1 deletions

View File

@@ -6389,8 +6389,13 @@ static int cnss_pci_register_mhi(struct cnss_pci_data *pci_priv)
if (cnss_pci_get_drv_supported(pci_priv))
cnss_mhi_controller_set_base(pci_priv, bar_start);
cnss_get_bwscal_info(plat_priv);
cnss_pr_dbg("no_bwscale: %d\n", plat_priv->no_bwscale);
/* BW scale CB needs to be set after registering MHI per requirement */
cnss_mhi_controller_set_bw_scale_cb(pci_priv, cnss_mhi_bw_scale);
if (!plat_priv->no_bwscale)
cnss_mhi_controller_set_bw_scale_cb(pci_priv,
cnss_mhi_bw_scale);
ret = cnss_pci_update_fw_name(pci_priv);
if (ret)